patch 'net/mlx5: fix start without duplicate flow patterns' has been queued to stable release 23.11.2

Xueming Li xuemingl at nvidia.com
Mon Aug 12 14:48:45 CEST 2024


Hi,

FYI, your patch has been queued to stable release 23.11.2

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 08/14/24. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://git.dpdk.org/dpdk-stable/log/?h=23.11-staging

This queued commit can be viewed at:
https://git.dpdk.org/dpdk-stable/commit/?h=23.11-staging&id=d88beb497f74e9180ab15b7036923952de84bd07

Thanks.

Xueming Li <xuemingl at nvidia.com>

---
>From d88beb497f74e9180ab15b7036923952de84bd07 Mon Sep 17 00:00:00 2001
From: Rongwei Liu <rongweil at nvidia.com>
Date: Thu, 13 Jun 2024 15:45:28 +0300
Subject: [PATCH] net/mlx5: fix start without duplicate flow patterns
Cc: Xueming Li <xuemingl at nvidia.com>

[ upstream commit 13b5713a627d313d4717923df4c37158b1cb4019 ]

When devargs "allow_duplicate_pattern=0" is specified, PMD won't
allow duplicated flows to be inserted and return EEXIST as rte_errno.

The queue/RSS split table is shared globally by all representors and
PMD didn't prepend port information into it, so all the following ports
tries to insert the same flows and cause PMD insertion failure.

Using the hash list to manage it can solve the issue.

Fixes: ddb68e47331e ("net/mlx5: add extended metadata mode for HWS")

Signed-off-by: Rongwei Liu <rongweil at nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo at nvidia.com>
---
 drivers/net/mlx5/linux/mlx5_os.c | 106 +++++++++++++++++--------------
 drivers/net/mlx5/mlx5.c          |   2 -
 drivers/net/mlx5/mlx5.h          |   4 +-
 drivers/net/mlx5/mlx5_flow.c     |  16 ++---
 4 files changed, 67 insertions(+), 61 deletions(-)

diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index fd104dabb2..2cf609873a 100644
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -455,15 +455,16 @@ __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
  * Routine checks the reference counter and does actual
  * resources creation/initialization only if counter is zero.
  *
- * @param[in] priv
- *   Pointer to the private device data structure.
+ * @param[in] eth_dev
+ *   Pointer to the device.
  *
  * @return
  *   Zero on success, positive error code otherwise.
  */
 static int
-mlx5_alloc_shared_dr(struct mlx5_priv *priv)
+mlx5_alloc_shared_dr(struct rte_eth_dev *eth_dev)
 {
+	struct mlx5_priv *priv = eth_dev->data->dev_private;
 	struct mlx5_dev_ctx_shared *sh = priv->sh;
 	char s[MLX5_NAME_SIZE] __rte_unused;
 	int err;
@@ -578,6 +579,44 @@ mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 		err = errno;
 		goto error;
 	}
+
+	if (sh->config.dv_flow_en == 1) {
+		/* Query availability of metadata reg_c's. */
+		if (!priv->sh->metadata_regc_check_flag) {
+			err = mlx5_flow_discover_mreg_c(eth_dev);
+			if (err < 0) {
+				err = -err;
+				goto error;
+			}
+		}
+		if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
+			DRV_LOG(DEBUG,
+				"port %u extensive metadata register is not supported",
+				eth_dev->data->port_id);
+			if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
+				DRV_LOG(ERR, "metadata mode %u is not supported "
+					     "(no metadata registers available)",
+					     sh->config.dv_xmeta_en);
+				err = ENOTSUP;
+				goto error;
+			}
+		}
+		if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
+		    mlx5_flow_ext_mreg_supported(eth_dev) && sh->dv_regc0_mask) {
+			sh->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
+							    MLX5_FLOW_MREG_HTABLE_SZ,
+							    false, true, eth_dev,
+							    flow_dv_mreg_create_cb,
+							    flow_dv_mreg_match_cb,
+							    flow_dv_mreg_remove_cb,
+							    flow_dv_mreg_clone_cb,
+							    flow_dv_mreg_clone_free_cb);
+			if (!sh->mreg_cp_tbl) {
+				err = ENOMEM;
+				goto error;
+			}
+		}
+	}
 #endif
 	if (!sh->tunnel_hub && sh->config.dv_miss_info)
 		err = mlx5_alloc_tunnel_hub(sh);
@@ -662,6 +701,10 @@ error:
 		mlx5_list_destroy(sh->dest_array_list);
 		sh->dest_array_list = NULL;
 	}
+	if (sh->mreg_cp_tbl) {
+		mlx5_hlist_destroy(sh->mreg_cp_tbl);
+		sh->mreg_cp_tbl = NULL;
+	}
 	return err;
 }
 
@@ -759,6 +802,10 @@ mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 		mlx5_list_destroy(sh->dest_array_list);
 		sh->dest_array_list = NULL;
 	}
+	if (sh->mreg_cp_tbl) {
+		mlx5_hlist_destroy(sh->mreg_cp_tbl);
+		sh->mreg_cp_tbl = NULL;
+	}
 }
 
 /**
@@ -1545,13 +1592,6 @@ err_secondary:
 	}
 	/* Create context for virtual machine VLAN workaround. */
 	priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
-	if (sh->config.dv_flow_en) {
-		err = mlx5_alloc_shared_dr(priv);
-		if (err)
-			goto error;
-		if (mlx5_flex_item_port_init(eth_dev) < 0)
-			goto error;
-	}
 	if (mlx5_devx_obj_ops_en(sh)) {
 		priv->obj_ops = devx_obj_ops;
 		mlx5_queue_counter_id_prepare(eth_dev);
@@ -1602,6 +1642,13 @@ err_secondary:
 			goto error;
 	}
 	rte_rwlock_init(&priv->ind_tbls_lock);
+	if (sh->config.dv_flow_en) {
+		err = mlx5_alloc_shared_dr(eth_dev);
+		if (err)
+			goto error;
+		if (mlx5_flex_item_port_init(eth_dev) < 0)
+			goto error;
+	}
 	if (priv->sh->config.dv_flow_en == 2) {
 #ifdef HAVE_MLX5_HWS_SUPPORT
 		if (priv->sh->config.dv_esw_en) {
@@ -1682,43 +1729,6 @@ err_secondary:
 		err = -err;
 		goto error;
 	}
-	/* Query availability of metadata reg_c's. */
-	if (!priv->sh->metadata_regc_check_flag) {
-		err = mlx5_flow_discover_mreg_c(eth_dev);
-		if (err < 0) {
-			err = -err;
-			goto error;
-		}
-	}
-	if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
-		DRV_LOG(DEBUG,
-			"port %u extensive metadata register is not supported",
-			eth_dev->data->port_id);
-		if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
-			DRV_LOG(ERR, "metadata mode %u is not supported "
-				     "(no metadata registers available)",
-				     sh->config.dv_xmeta_en);
-			err = ENOTSUP;
-			goto error;
-		}
-	}
-	if (sh->config.dv_flow_en &&
-	    sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
-	    mlx5_flow_ext_mreg_supported(eth_dev) &&
-	    priv->sh->dv_regc0_mask) {
-		priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
-						      MLX5_FLOW_MREG_HTABLE_SZ,
-						      false, true, eth_dev,
-						      flow_dv_mreg_create_cb,
-						      flow_dv_mreg_match_cb,
-						      flow_dv_mreg_remove_cb,
-						      flow_dv_mreg_clone_cb,
-						    flow_dv_mreg_clone_free_cb);
-		if (!priv->mreg_cp_tbl) {
-			err = ENOMEM;
-			goto error;
-		}
-	}
 	rte_spinlock_init(&priv->shared_act_sl);
 	mlx5_flow_counter_mode_config(eth_dev);
 	mlx5_flow_drop_action_config(eth_dev);
@@ -1737,8 +1747,6 @@ error:
 		    priv->sh->config.dv_esw_en)
 			flow_hw_destroy_vport_action(eth_dev);
 #endif
-		if (priv->mreg_cp_tbl)
-			mlx5_hlist_destroy(priv->mreg_cp_tbl);
 		if (priv->sh)
 			mlx5_os_free_shared_dr(priv);
 		if (priv->nl_socket_route >= 0)
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index 417e88e848..8d4a0a3dda 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -2296,8 +2296,6 @@ mlx5_dev_close(struct rte_eth_dev *dev)
 		mlx5_devx_cmd_destroy(priv->q_counters);
 		priv->q_counters = NULL;
 	}
-	if (priv->mreg_cp_tbl)
-		mlx5_hlist_destroy(priv->mreg_cp_tbl);
 	mlx5_mprq_free_mp(dev);
 	mlx5_os_free_shared_dr(priv);
 #ifdef HAVE_MLX5_HWS_SUPPORT
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 33401d96e4..1ac8e07d07 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -1481,6 +1481,8 @@ struct mlx5_dev_ctx_shared {
 		struct mlx5_hlist *flow_tbls; /* SWS flow table. */
 		struct mlx5_hlist *groups; /* HWS flow group. */
 	};
+	struct mlx5_hlist *mreg_cp_tbl;
+	/* Hash table of Rx metadata register copy table. */
 	struct mlx5_flow_tunnel_hub *tunnel_hub;
 	/* Direct Rules tables for FDB, NIC TX+RX */
 	void *dr_drop_action; /* Pointer to DR drop action, any domain. */
@@ -1904,8 +1906,6 @@ struct mlx5_priv {
 	int nl_socket_rdma; /* Netlink socket (NETLINK_RDMA). */
 	int nl_socket_route; /* Netlink socket (NETLINK_ROUTE). */
 	struct mlx5_nl_vlan_vmwa_context *vmwa_context; /* VLAN WA context. */
-	struct mlx5_hlist *mreg_cp_tbl;
-	/* Hash table of Rx metadata register copy table. */
 	struct mlx5_mtr_config mtr_config; /* Meter configuration */
 	uint8_t mtr_sfx_reg; /* Meter prefix-suffix flow match REG_C. */
 	struct mlx5_legacy_flow_meters flow_meters; /* MTR list. */
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index ccfd189c1f..85b9ae3901 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -5228,8 +5228,8 @@ flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
 	};
 
 	/* Check if already registered. */
-	MLX5_ASSERT(priv->mreg_cp_tbl);
-	entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
+	MLX5_ASSERT(priv->sh->mreg_cp_tbl);
+	entry = mlx5_hlist_register(priv->sh->mreg_cp_tbl, mark_id, &ctx);
 	if (!entry)
 		return NULL;
 	return container_of(entry, struct mlx5_flow_mreg_copy_resource,
@@ -5268,10 +5268,10 @@ flow_mreg_del_copy_action(struct rte_eth_dev *dev,
 		return;
 	mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
 				 flow->rix_mreg_copy);
-	if (!mcp_res || !priv->mreg_cp_tbl)
+	if (!mcp_res || !priv->sh->mreg_cp_tbl)
 		return;
 	MLX5_ASSERT(mcp_res->rix_flow);
-	mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
+	mlx5_hlist_unregister(priv->sh->mreg_cp_tbl, &mcp_res->hlist_ent);
 	flow->rix_mreg_copy = 0;
 }
 
@@ -5293,14 +5293,14 @@ flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
 	uint32_t mark_id;
 
 	/* Check if default flow is registered. */
-	if (!priv->mreg_cp_tbl)
+	if (!priv->sh->mreg_cp_tbl)
 		return;
 	mark_id = MLX5_DEFAULT_COPY_ID;
 	ctx.data = &mark_id;
-	entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx);
+	entry = mlx5_hlist_lookup(priv->sh->mreg_cp_tbl, mark_id, &ctx);
 	if (!entry)
 		return;
-	mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
+	mlx5_hlist_unregister(priv->sh->mreg_cp_tbl, entry);
 }
 
 /**
@@ -5338,7 +5338,7 @@ flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
 	 */
 	mark_id = MLX5_DEFAULT_COPY_ID;
 	ctx.data = &mark_id;
-	if (mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx))
+	if (mlx5_hlist_lookup(priv->sh->mreg_cp_tbl, mark_id, &ctx))
 		return 0;
 	mcp_res = flow_mreg_add_copy_action(dev, mark_id, error);
 	if (!mcp_res)
-- 
2.34.1

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2024-08-12 20:44:04.128429571 +0800
+++ 0048-net-mlx5-fix-start-without-duplicate-flow-patterns.patch	2024-08-12 20:44:02.045069285 +0800
@@ -1 +1 @@
-From 13b5713a627d313d4717923df4c37158b1cb4019 Mon Sep 17 00:00:00 2001
+From d88beb497f74e9180ab15b7036923952de84bd07 Mon Sep 17 00:00:00 2001
@@ -4,0 +5,3 @@
+Cc: Xueming Li <xuemingl at nvidia.com>
+
+[ upstream commit 13b5713a627d313d4717923df4c37158b1cb4019 ]
@@ -16 +18,0 @@
-Cc: stable at dpdk.org
@@ -28 +30 @@
-index 1753acd050..50f4810bff 100644
+index fd104dabb2..2cf609873a 100644
@@ -31 +33 @@
-@@ -467,15 +467,16 @@ __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
+@@ -455,15 +455,16 @@ __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
@@ -51 +53 @@
-@@ -590,6 +591,44 @@ mlx5_alloc_shared_dr(struct mlx5_priv *priv)
+@@ -578,6 +579,44 @@ mlx5_alloc_shared_dr(struct mlx5_priv *priv)
@@ -96 +98 @@
-@@ -674,6 +713,10 @@ error:
+@@ -662,6 +701,10 @@ error:
@@ -107 +109 @@
-@@ -771,6 +814,10 @@ mlx5_os_free_shared_dr(struct mlx5_priv *priv)
+@@ -759,6 +802,10 @@ mlx5_os_free_shared_dr(struct mlx5_priv *priv)
@@ -118 +120 @@
-@@ -1572,13 +1619,6 @@ err_secondary:
+@@ -1545,13 +1592,6 @@ err_secondary:
@@ -132 +134 @@
-@@ -1629,6 +1669,13 @@ err_secondary:
+@@ -1602,6 +1642,13 @@ err_secondary:
@@ -143,4 +145,4 @@
- 	if (sh->phdev->config.ipv6_tc_fallback == MLX5_IPV6_TC_UNKNOWN) {
- 		sh->phdev->config.ipv6_tc_fallback = MLX5_IPV6_TC_OK;
- 		if (!sh->cdev->config.hca_attr.modify_outer_ipv6_traffic_class ||
-@@ -1715,43 +1762,6 @@ err_secondary:
+ 	if (priv->sh->config.dv_flow_en == 2) {
+ #ifdef HAVE_MLX5_HWS_SUPPORT
+ 		if (priv->sh->config.dv_esw_en) {
+@@ -1682,43 +1729,6 @@ err_secondary:
@@ -190 +192 @@
-@@ -1770,8 +1780,6 @@ error:
+@@ -1737,8 +1747,6 @@ error:
@@ -200 +202 @@
-index 997b02c571..e482f7f0e5 100644
+index 417e88e848..8d4a0a3dda 100644
@@ -203 +205 @@
-@@ -2394,8 +2394,6 @@ mlx5_dev_close(struct rte_eth_dev *dev)
+@@ -2296,8 +2296,6 @@ mlx5_dev_close(struct rte_eth_dev *dev)
@@ -213 +215 @@
-index c9a3837bd2..bd149b43e5 100644
+index 33401d96e4..1ac8e07d07 100644
@@ -216 +218 @@
-@@ -1542,6 +1542,8 @@ struct mlx5_dev_ctx_shared {
+@@ -1481,6 +1481,8 @@ struct mlx5_dev_ctx_shared {
@@ -225 +227 @@
-@@ -1968,8 +1970,6 @@ struct mlx5_priv {
+@@ -1904,8 +1906,6 @@ struct mlx5_priv {
@@ -235 +237 @@
-index daf0e41c6f..833db1f320 100644
+index ccfd189c1f..85b9ae3901 100644
@@ -238 +240 @@
-@@ -5201,8 +5201,8 @@ flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
+@@ -5228,8 +5228,8 @@ flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
@@ -249 +251 @@
-@@ -5241,10 +5241,10 @@ flow_mreg_del_copy_action(struct rte_eth_dev *dev,
+@@ -5268,10 +5268,10 @@ flow_mreg_del_copy_action(struct rte_eth_dev *dev,
@@ -262 +264 @@
-@@ -5266,14 +5266,14 @@ flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
+@@ -5293,14 +5293,14 @@ flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
@@ -280 +282 @@
-@@ -5311,7 +5311,7 @@ flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
+@@ -5338,7 +5338,7 @@ flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,


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