patch 'net/cpfl: add checks on control queue messages' has been queued to stable release 23.11.2

Xueming Li xuemingl at nvidia.com
Mon Aug 12 14:49:01 CEST 2024


Hi,

FYI, your patch has been queued to stable release 23.11.2

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 08/14/24. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://git.dpdk.org/dpdk-stable/log/?h=23.11-staging

This queued commit can be viewed at:
https://git.dpdk.org/dpdk-stable/commit/?h=23.11-staging&id=ec9de9db2d45cd8aef7bd3287e56755ebf2704da

Thanks.

Xueming Li <xuemingl at nvidia.com>

---
>From ec9de9db2d45cd8aef7bd3287e56755ebf2704da Mon Sep 17 00:00:00 2001
From: Soumyadeep Hore <soumyadeep.hore at intel.com>
Date: Fri, 5 Jul 2024 13:05:14 +0000
Subject: [PATCH] net/cpfl: add checks on control queue messages
Cc: Xueming Li <xuemingl at nvidia.com>

[ upstream commit 632b57048bb86bb88eb31ef118a0715218d528f0 ]

Include checks for error status returned for specific opcodes and
display error messages accordingly, returning the error status back to
the caller. Update caller to handle these new positive error values as
well as the negative ones.

Fixes: db042ef09d26 ("net/cpfl: implement FXP rule creation and destroying")

Signed-off-by: Soumyadeep Hore <soumyadeep.hore at intel.com>
Acked-by: Bruce Richardson <bruce.richardson at intel.com>
---
 drivers/net/cpfl/cpfl_flow_engine_fxp.c |  2 +-
 drivers/net/cpfl/cpfl_fxp_rule.c        |  8 ++++++++
 drivers/net/cpfl/cpfl_rules.h           | 11 +++++++++++
 3 files changed, 20 insertions(+), 1 deletion(-)

diff --git a/drivers/net/cpfl/cpfl_flow_engine_fxp.c b/drivers/net/cpfl/cpfl_flow_engine_fxp.c
index 8a4e1419b4..f6bd1f7599 100644
--- a/drivers/net/cpfl/cpfl_flow_engine_fxp.c
+++ b/drivers/net/cpfl/cpfl_flow_engine_fxp.c
@@ -95,7 +95,7 @@ cpfl_fxp_create(struct rte_eth_dev *dev,
 
 	ret = cpfl_rule_process(itf, ad->ctlqp[cpq_id], ad->ctlqp[cpq_id + 1],
 				rim->rules, rim->rule_num, true);
-	if (ret < 0) {
+	if (ret != 0) {
 		rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 				   "cpfl filter create flow fail");
 		rte_free(rim);
diff --git a/drivers/net/cpfl/cpfl_fxp_rule.c b/drivers/net/cpfl/cpfl_fxp_rule.c
index 0e710a007b..be34da9fa2 100644
--- a/drivers/net/cpfl/cpfl_fxp_rule.c
+++ b/drivers/net/cpfl/cpfl_fxp_rule.c
@@ -92,6 +92,14 @@ cpfl_receive_ctlq_msg(struct idpf_hw *hw, struct idpf_ctlq_info *cq, u16 num_q_m
 
 		/* TODO - process rx controlq message */
 		for (i = 0; i < num_q_msg; i++) {
+			ret = q_msg[i].status;
+			if (ret != CPFL_CFG_PKT_ERR_OK &&
+			    q_msg[i].opcode != cpfl_ctlq_sem_query_del_rule_hash_addr) {
+				PMD_INIT_LOG(ERR, "Failed to process rx_ctrlq msg: %s",
+					cpfl_cfg_pkt_errormsg[ret]);
+				return ret;
+			}
+
 			if (q_msg[i].data_len > 0)
 				dma = q_msg[i].ctx.indirect.payload;
 			else
diff --git a/drivers/net/cpfl/cpfl_rules.h b/drivers/net/cpfl/cpfl_rules.h
index d23eae8e91..10569b1fdc 100644
--- a/drivers/net/cpfl/cpfl_rules.h
+++ b/drivers/net/cpfl/cpfl_rules.h
@@ -62,6 +62,17 @@ enum cpfl_cfg_pkt_error_code {
 	CPFL_CFG_PKT_ERR_EMAXCOL = 9    /* Max Hash Collision */
 };
 
+static const char * const cpfl_cfg_pkt_errormsg[] = {
+	[CPFL_CFG_PKT_ERR_ESRCH] = "Bad opcode",
+	[CPFL_CFG_PKT_ERR_EEXIST] = "The rule conflicts with already existed one",
+	[CPFL_CFG_PKT_ERR_ENOSPC] = "No space left in the table",
+	[CPFL_CFG_PKT_ERR_ERANGE] = "Parameter out of range",
+	[CPFL_CFG_PKT_ERR_ESBCOMP] = "Completion error",
+	[CPFL_CFG_PKT_ERR_ENOPIN] = "Entry cannot be pinned in cache",
+	[CPFL_CFG_PKT_ERR_ENOTFND] = "Entry does not exist",
+	[CPFL_CFG_PKT_ERR_EMAXCOL] = "Maximum Hash Collisions reached",
+};
+
 /* macros for creating context for rule descriptor */
 #define MEV_RULE_VSI_ID_S		0
 #define MEV_RULE_VSI_ID_M		\
-- 
2.34.1

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2024-08-12 20:44:04.662185528 +0800
+++ 0064-net-cpfl-add-checks-on-control-queue-messages.patch	2024-08-12 20:44:02.145069304 +0800
@@ -1 +1 @@
-From 632b57048bb86bb88eb31ef118a0715218d528f0 Mon Sep 17 00:00:00 2001
+From ec9de9db2d45cd8aef7bd3287e56755ebf2704da Mon Sep 17 00:00:00 2001
@@ -4,0 +5,3 @@
+Cc: Xueming Li <xuemingl at nvidia.com>
+
+[ upstream commit 632b57048bb86bb88eb31ef118a0715218d528f0 ]
@@ -12 +14,0 @@
-Cc: stable at dpdk.org
@@ -23 +25 @@
-index 39a281fa61..b9e825ef57 100644
+index 8a4e1419b4..f6bd1f7599 100644


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