patch 'dma/hisilicon: remove support for HIP09 platform' has been queued to stable release 23.11.2

Xueming Li xuemingl at nvidia.com
Mon Aug 12 14:50:16 CEST 2024


Hi,

FYI, your patch has been queued to stable release 23.11.2

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 08/14/24. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://git.dpdk.org/dpdk-stable/log/?h=23.11-staging

This queued commit can be viewed at:
https://git.dpdk.org/dpdk-stable/commit/?h=23.11-staging&id=eacf416207f88132c1a51891dddb976ebd740cd5

Thanks.

Xueming Li <xuemingl at nvidia.com>

---
>From eacf416207f88132c1a51891dddb976ebd740cd5 Mon Sep 17 00:00:00 2001
From: Chengwen Feng <fengchengwen at huawei.com>
Date: Thu, 4 Jul 2024 02:53:17 +0000
Subject: [PATCH] dma/hisilicon: remove support for HIP09 platform
Cc: Xueming Li <xuemingl at nvidia.com>

[ upstream commit 2a3f42942a5f4df62108679ef44a34d21b4a2553 ]

The DMA for HIP09 is no longer available, so delete it.

Signed-off-by: Chengwen Feng <fengchengwen at huawei.com>
---
 doc/guides/dmadevs/hisilicon.rst    |  1 -
 drivers/dma/hisilicon/hisi_dmadev.c | 40 +----------------------------
 drivers/dma/hisilicon/hisi_dmadev.h | 35 +------------------------
 3 files changed, 2 insertions(+), 74 deletions(-)

diff --git a/doc/guides/dmadevs/hisilicon.rst b/doc/guides/dmadevs/hisilicon.rst
index 8c1f0f8886..974bc49376 100644
--- a/doc/guides/dmadevs/hisilicon.rst
+++ b/doc/guides/dmadevs/hisilicon.rst
@@ -13,7 +13,6 @@ Supported Kunpeng SoCs
 ----------------------
 
 * Kunpeng 920
-* Kunpeng 930
 
 
 Device Setup
diff --git a/drivers/dma/hisilicon/hisi_dmadev.c b/drivers/dma/hisilicon/hisi_dmadev.c
index 0e11ca14cc..4db3b0554c 100644
--- a/drivers/dma/hisilicon/hisi_dmadev.c
+++ b/drivers/dma/hisilicon/hisi_dmadev.c
@@ -39,8 +39,6 @@ hisi_dma_queue_base(struct hisi_dma_dev *hw)
 {
 	if (hw->reg_layout == HISI_DMA_REG_LAYOUT_HIP08)
 		return HISI_DMA_HIP08_QUEUE_BASE;
-	else if (hw->reg_layout == HISI_DMA_REG_LAYOUT_HIP09)
-		return HISI_DMA_HIP09_QUEUE_BASE;
 	else
 		return 0;
 }
@@ -216,25 +214,6 @@ hisi_dma_init_hw(struct hisi_dma_dev *hw)
 				HISI_DMA_HIP08_QUEUE_INT_MASK_M, true);
 		hisi_dma_update_queue_mbit(hw, HISI_DMA_QUEUE_INT_MASK_REG,
 				HISI_DMA_HIP08_QUEUE_INT_MASK_M, true);
-	} else if (hw->reg_layout == HISI_DMA_REG_LAYOUT_HIP09) {
-		hisi_dma_update_queue_mbit(hw, HISI_DMA_QUEUE_CTRL0_REG,
-				HISI_DMA_HIP09_QUEUE_CTRL0_ERR_ABORT_M, false);
-		hisi_dma_update_queue_mbit(hw, HISI_DMA_QUEUE_INT_STATUS_REG,
-				HISI_DMA_HIP09_QUEUE_INT_MASK_M, true);
-		hisi_dma_update_queue_mbit(hw, HISI_DMA_QUEUE_INT_MASK_REG,
-				HISI_DMA_HIP09_QUEUE_INT_MASK_M, true);
-		hisi_dma_update_queue_mbit(hw,
-				HISI_DMA_HIP09_QUEUE_ERR_INT_STATUS_REG,
-				HISI_DMA_HIP09_QUEUE_ERR_INT_MASK_M, true);
-		hisi_dma_update_queue_mbit(hw,
-				HISI_DMA_HIP09_QUEUE_ERR_INT_MASK_REG,
-				HISI_DMA_HIP09_QUEUE_ERR_INT_MASK_M, true);
-		hisi_dma_update_queue_bit(hw, HISI_DMA_QUEUE_CTRL1_REG,
-				HISI_DMA_HIP09_QUEUE_CTRL1_VA_ENABLE_B, true);
-		hisi_dma_update_bit(hw,
-				HISI_DMA_HIP09_QUEUE_CFG_REG(hw->queue_id),
-				HISI_DMA_HIP09_QUEUE_CFG_LINK_DOWN_MASK_B,
-				true);
 	}
 }
 
@@ -256,8 +235,6 @@ hisi_dma_reg_layout(uint8_t revision)
 {
 	if (revision == HISI_DMA_REVISION_HIP08B)
 		return HISI_DMA_REG_LAYOUT_HIP08;
-	else if (revision >= HISI_DMA_REVISION_HIP09A)
-		return HISI_DMA_REG_LAYOUT_HIP09;
 	else
 		return HISI_DMA_REG_LAYOUT_INVALID;
 }
@@ -328,14 +305,11 @@ hisi_dma_info_get(const struct rte_dma_dev *dev,
 		  struct rte_dma_info *dev_info,
 		  uint32_t info_sz)
 {
-	struct hisi_dma_dev *hw = dev->data->dev_private;
+	RTE_SET_USED(dev);
 	RTE_SET_USED(info_sz);
 
 	dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM |
 			     RTE_DMA_CAPA_OPS_COPY;
-	if (hw->reg_layout == HISI_DMA_REG_LAYOUT_HIP09)
-		dev_info->dev_capa |= RTE_DMA_CAPA_HANDLES_ERRORS;
-
 	dev_info->max_vchans = 1;
 	dev_info->max_desc = HISI_DMA_MAX_DESC_NUM;
 	dev_info->min_desc = HISI_DMA_MIN_DESC_NUM;
@@ -514,18 +488,6 @@ hisi_dma_dump_common(struct hisi_dma_dev *hw, FILE *f)
 		{ HISI_DMA_REG_LAYOUT_HIP08,
 		  HISI_DMA_HIP08_DUMP_START_REG,
 		  HISI_DMA_HIP08_DUMP_END_REG },
-		{ HISI_DMA_REG_LAYOUT_HIP09,
-		  HISI_DMA_HIP09_DUMP_REGION_A_START_REG,
-		  HISI_DMA_HIP09_DUMP_REGION_A_END_REG },
-		{ HISI_DMA_REG_LAYOUT_HIP09,
-		  HISI_DMA_HIP09_DUMP_REGION_B_START_REG,
-		  HISI_DMA_HIP09_DUMP_REGION_B_END_REG },
-		{ HISI_DMA_REG_LAYOUT_HIP09,
-		  HISI_DMA_HIP09_DUMP_REGION_C_START_REG,
-		  HISI_DMA_HIP09_DUMP_REGION_C_END_REG },
-		{ HISI_DMA_REG_LAYOUT_HIP09,
-		  HISI_DMA_HIP09_DUMP_REGION_D_START_REG,
-		  HISI_DMA_HIP09_DUMP_REGION_D_END_REG },
 	};
 	uint32_t i;
 
diff --git a/drivers/dma/hisilicon/hisi_dmadev.h b/drivers/dma/hisilicon/hisi_dmadev.h
index 5a17f9f69e..a57b5c759a 100644
--- a/drivers/dma/hisilicon/hisi_dmadev.h
+++ b/drivers/dma/hisilicon/hisi_dmadev.h
@@ -25,22 +25,14 @@
 #define HISI_DMA_DEVICE_ID			0xA122
 #define HISI_DMA_PCI_REVISION_ID_REG		0x08
 #define HISI_DMA_REVISION_HIP08B		0x21
-#define HISI_DMA_REVISION_HIP09A		0x30
 
 #define HISI_DMA_MAX_HW_QUEUES			4
 #define HISI_DMA_MAX_DESC_NUM			8192
 #define HISI_DMA_MIN_DESC_NUM			32
 
-/**
- * The HIP08B(HiSilicon IP08) and HIP09B(HiSilicon IP09) are DMA iEPs, they
- * have the same pci device id but different pci revision.
- * Unfortunately, they have different register layouts, so two layout
- * enumerations are defined.
- */
 enum {
 	HISI_DMA_REG_LAYOUT_INVALID = 0,
-	HISI_DMA_REG_LAYOUT_HIP08,
-	HISI_DMA_REG_LAYOUT_HIP09
+	HISI_DMA_REG_LAYOUT_HIP08
 };
 
 /**
@@ -69,9 +61,6 @@ enum {
  * length of queue-region. The global offset for a single queue register is
  * calculated by:
  *     offset = queue-base + (queue-id * queue-region) + reg-offset-in-region.
- *
- * The first part of queue region is basically the same for HIP08 and HIP09
- * register layouts, therefore, HISI_QUEUE_* registers are defined for it.
  */
 #define HISI_DMA_QUEUE_SQ_BASE_L_REG		0x0
 #define HISI_DMA_QUEUE_SQ_BASE_H_REG		0x4
@@ -110,28 +99,6 @@ enum {
 #define HISI_DMA_HIP08_DUMP_START_REG			0x2000
 #define HISI_DMA_HIP08_DUMP_END_REG			0x2280
 
-/**
- * HiSilicon IP09 DMA register and field define:
- */
-#define HISI_DMA_HIP09_QUEUE_BASE			0x2000
-#define HISI_DMA_HIP09_QUEUE_CTRL0_ERR_ABORT_M		GENMASK(31, 28)
-#define HISI_DMA_HIP09_QUEUE_CTRL1_VA_ENABLE_B		2
-#define HISI_DMA_HIP09_QUEUE_INT_MASK_M			0x1
-#define HISI_DMA_HIP09_QUEUE_ERR_INT_STATUS_REG		0x48
-#define HISI_DMA_HIP09_QUEUE_ERR_INT_MASK_REG		0x4C
-#define HISI_DMA_HIP09_QUEUE_ERR_INT_MASK_M		GENMASK(18, 1)
-#define HISI_DMA_HIP09_QUEUE_CFG_REG(queue_id)		(0x800 + \
-							 (queue_id) * 0x20)
-#define HISI_DMA_HIP09_QUEUE_CFG_LINK_DOWN_MASK_B	16
-#define HISI_DMA_HIP09_DUMP_REGION_A_START_REG		0x0
-#define HISI_DMA_HIP09_DUMP_REGION_A_END_REG		0x368
-#define HISI_DMA_HIP09_DUMP_REGION_B_START_REG		0x800
-#define HISI_DMA_HIP09_DUMP_REGION_B_END_REG		0xA08
-#define HISI_DMA_HIP09_DUMP_REGION_C_START_REG		0x1800
-#define HISI_DMA_HIP09_DUMP_REGION_C_END_REG		0x1A4C
-#define HISI_DMA_HIP09_DUMP_REGION_D_START_REG		0x1C00
-#define HISI_DMA_HIP09_DUMP_REGION_D_END_REG		0x1CC4
-
 /**
  * In fact, there are multiple states, but it need to pay attention to
  * the following three states for the driver:
-- 
2.34.1

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2024-08-12 20:44:06.895264451 +0800
+++ 0139-dma-hisilicon-remove-support-for-HIP09-platform.patch	2024-08-12 20:44:02.555069385 +0800
@@ -1 +1 @@
-From 2a3f42942a5f4df62108679ef44a34d21b4a2553 Mon Sep 17 00:00:00 2001
+From eacf416207f88132c1a51891dddb976ebd740cd5 Mon Sep 17 00:00:00 2001
@@ -4,0 +5 @@
+Cc: Xueming Li <xuemingl at nvidia.com>
@@ -6 +7 @@
-The DMA for HIP09 is no longer available, so delete it.
+[ upstream commit 2a3f42942a5f4df62108679ef44a34d21b4a2553 ]
@@ -8 +9 @@
-Cc: stable at dpdk.org
+The DMA for HIP09 is no longer available, so delete it.
@@ -12,5 +13,4 @@
- doc/guides/dmadevs/hisilicon.rst       |  1 -
- doc/guides/rel_notes/release_24_07.rst |  5 ++++
- drivers/dma/hisilicon/hisi_dmadev.c    | 40 +-------------------------
- drivers/dma/hisilicon/hisi_dmadev.h    | 35 +---------------------
- 4 files changed, 7 insertions(+), 74 deletions(-)
+ doc/guides/dmadevs/hisilicon.rst    |  1 -
+ drivers/dma/hisilicon/hisi_dmadev.c | 40 +----------------------------
+ drivers/dma/hisilicon/hisi_dmadev.h | 35 +------------------------
+ 3 files changed, 2 insertions(+), 74 deletions(-)
@@ -30,16 +29,0 @@
-diff --git a/doc/guides/rel_notes/release_24_07.rst b/doc/guides/rel_notes/release_24_07.rst
-index 058609b0f3..eb2ed1a55f 100644
---- a/doc/guides/rel_notes/release_24_07.rst
-+++ b/doc/guides/rel_notes/release_24_07.rst
-@@ -204,6 +204,11 @@ Removed Items
-   BPF is not supported and the librte-bpf test fails on 32-bit x86 kernels.
-   So disable the library and the pmd.
- 
-+* **Removed hisilicon DMA support for HIP09 platform.**
-+
-+  The DMA for HIP09 is no longer available,
-+  so the support is removed from hisilicon driver for HIP09 platform.
-+
- 
- API Changes
- -----------
@@ -47 +31 @@
-index e96bc1d654..7cd6ebc1e0 100644
+index 0e11ca14cc..4db3b0554c 100644
@@ -94 +78 @@
-@@ -327,14 +304,11 @@ hisi_dma_info_get(const struct rte_dma_dev *dev,
+@@ -328,14 +305,11 @@ hisi_dma_info_get(const struct rte_dma_dev *dev,
@@ -110 +94 @@
-@@ -513,18 +487,6 @@ hisi_dma_dump_common(struct hisi_dma_dev *hw, FILE *f)
+@@ -514,18 +488,6 @@ hisi_dma_dump_common(struct hisi_dma_dev *hw, FILE *f)


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