patch 'bus/pci: fix build with musl 1.2.4 / Alpine 3.19' has been queued to stable release 21.11.8

Kevin Traynor ktraynor at redhat.com
Fri Aug 23 18:17:09 CEST 2024
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Hi,

FYI, your patch has been queued to stable release 21.11.8

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 08/28/24. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable

This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/a7fb1c9784e31cded44345f3347dcadb47777f5c

Thanks.

Kevin

---
>From a7fb1c9784e31cded44345f3347dcadb47777f5c Mon Sep 17 00:00:00 2001
From: David Marchand <david.marchand at redhat.com>
Date: Mon, 29 Apr 2024 12:00:59 +0200
Subject: [PATCH] bus/pci: fix build with musl 1.2.4 / Alpine 3.19

[ upstream commit 884f83ccf74b5364430d3b21c653d5f6e359e091 ]

Following an upgrade of musl, pread64/pwrite64 wrappers are not provided
anymore. Switch to POSIX pread/pwrite.

Bugzilla ID: 1422

Signed-off-by: David Marchand <david.marchand at redhat.com>
Acked-by: Bruce Richardson <bruce.richardson at intel.com>
Tested-by: Patrick Robb <probb at iol.unh.edu>
Tested-by: Thomas Monjalon <thomas at monjalon.net>
---
 drivers/bus/pci/linux/pci_vfio.c | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c
index 822aa41f9e..847b95fe8c 100644
--- a/drivers/bus/pci/linux/pci_vfio.c
+++ b/drivers/bus/pci/linux/pci_vfio.c
@@ -54,5 +54,5 @@ pci_vfio_read_config(const struct rte_intr_handle *intr_handle,
 		return -1;
 
-	return pread64(vfio_dev_fd, buf, len,
+	return pread(vfio_dev_fd, buf, len,
 	       VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs);
 }
@@ -67,5 +67,5 @@ pci_vfio_write_config(const struct rte_intr_handle *intr_handle,
 		return -1;
 
-	return pwrite64(vfio_dev_fd, buf, len,
+	return pwrite(vfio_dev_fd, buf, len,
 	       VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs);
 }
@@ -81,5 +81,5 @@ pci_vfio_get_msix_bar(int fd, struct pci_msix_table *msix_table)
 
 	/* read PCI capability pointer from config space */
-	ret = pread64(fd, &reg, sizeof(reg),
+	ret = pread(fd, &reg, sizeof(reg),
 			VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
 			PCI_CAPABILITY_LIST);
@@ -96,5 +96,5 @@ pci_vfio_get_msix_bar(int fd, struct pci_msix_table *msix_table)
 
 		/* read PCI capability ID */
-		ret = pread64(fd, &reg, sizeof(reg),
+		ret = pread(fd, &reg, sizeof(reg),
 				VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
 				cap_offset);
@@ -110,5 +110,5 @@ pci_vfio_get_msix_bar(int fd, struct pci_msix_table *msix_table)
 		/* if we haven't reached MSI-X, check next capability */
 		if (cap_id != PCI_CAP_ID_MSIX) {
-			ret = pread64(fd, &reg, sizeof(reg),
+			ret = pread(fd, &reg, sizeof(reg),
 					VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
 					cap_offset);
@@ -127,5 +127,5 @@ pci_vfio_get_msix_bar(int fd, struct pci_msix_table *msix_table)
 		else {
 			/* table offset resides in the next 4 bytes */
-			ret = pread64(fd, &reg, sizeof(reg),
+			ret = pread(fd, &reg, sizeof(reg),
 					VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
 					cap_offset + 4);
@@ -136,5 +136,5 @@ pci_vfio_get_msix_bar(int fd, struct pci_msix_table *msix_table)
 			}
 
-			ret = pread64(fd, &flags, sizeof(flags),
+			ret = pread(fd, &flags, sizeof(flags),
 					VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
 					cap_offset + 2);
@@ -163,5 +163,5 @@ pci_vfio_enable_bus_memory(int dev_fd)
 	int ret;
 
-	ret = pread64(dev_fd, &cmd, sizeof(cmd),
+	ret = pread(dev_fd, &cmd, sizeof(cmd),
 		      VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
 		      PCI_COMMAND);
@@ -176,5 +176,5 @@ pci_vfio_enable_bus_memory(int dev_fd)
 
 	cmd |= PCI_COMMAND_MEMORY;
-	ret = pwrite64(dev_fd, &cmd, sizeof(cmd),
+	ret = pwrite(dev_fd, &cmd, sizeof(cmd),
 		       VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
 		       PCI_COMMAND);
@@ -195,5 +195,5 @@ pci_vfio_set_bus_master(int dev_fd, bool op)
 	int ret;
 
-	ret = pread64(dev_fd, &reg, sizeof(reg),
+	ret = pread(dev_fd, &reg, sizeof(reg),
 			VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
 			PCI_COMMAND);
@@ -209,5 +209,5 @@ pci_vfio_set_bus_master(int dev_fd, bool op)
 		reg &= ~(PCI_COMMAND_MASTER);
 
-	ret = pwrite64(dev_fd, &reg, sizeof(reg),
+	ret = pwrite(dev_fd, &reg, sizeof(reg),
 			VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
 			PCI_COMMAND);
@@ -465,5 +465,5 @@ pci_vfio_is_ioport_bar(int vfio_dev_fd, int bar_index)
 	int ret;
 
-	ret = pread64(vfio_dev_fd, &ioport_bar, sizeof(ioport_bar),
+	ret = pread(vfio_dev_fd, &ioport_bar, sizeof(ioport_bar),
 			  VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX)
 			  + PCI_BASE_ADDRESS_0 + bar_index*4);
@@ -1134,5 +1134,5 @@ pci_vfio_ioport_read(struct rte_pci_ioport *p,
 		return;
 
-	if (pread64(vfio_dev_fd, data,
+	if (pread(vfio_dev_fd, data,
 		    len, p->base + offset) <= 0)
 		RTE_LOG(ERR, EAL,
@@ -1151,5 +1151,5 @@ pci_vfio_ioport_write(struct rte_pci_ioport *p,
 		return;
 
-	if (pwrite64(vfio_dev_fd, data,
+	if (pwrite(vfio_dev_fd, data,
 		     len, p->base + offset) <= 0)
 		RTE_LOG(ERR, EAL,
-- 
2.46.0

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2024-08-23 17:18:09.943134777 +0100
+++ 0001-bus-pci-fix-build-with-musl-1.2.4-Alpine-3.19.patch	2024-08-23 17:18:09.603429697 +0100
@@ -1 +1 @@
-From 884f83ccf74b5364430d3b21c653d5f6e359e091 Mon Sep 17 00:00:00 2001
+From a7fb1c9784e31cded44345f3347dcadb47777f5c Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 884f83ccf74b5364430d3b21c653d5f6e359e091 ]
+
@@ -10 +11,0 @@
-Cc: stable at dpdk.org
@@ -17,2 +18,2 @@
- drivers/bus/pci/linux/pci_vfio.c | 18 +++++++++---------
- 1 file changed, 9 insertions(+), 9 deletions(-)
+ drivers/bus/pci/linux/pci_vfio.c | 28 ++++++++++++++--------------
+ 1 file changed, 14 insertions(+), 14 deletions(-)
@@ -21 +22 @@
-index 87c16e6603..05b03a9667 100644
+index 822aa41f9e..847b95fe8c 100644
@@ -24 +25 @@
-@@ -81,5 +81,5 @@ pci_vfio_read_config(const struct rte_pci_device *dev,
+@@ -54,5 +54,5 @@ pci_vfio_read_config(const struct rte_intr_handle *intr_handle,
@@ -27,2 +28,3 @@
--	return pread64(fd, buf, len, offset + offs);
-+	return pread(fd, buf, len, offset + offs);
+-	return pread64(vfio_dev_fd, buf, len,
++	return pread(vfio_dev_fd, buf, len,
+ 	       VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs);
@@ -30,2 +32 @@
- 
-@@ -102,5 +102,5 @@ pci_vfio_write_config(const struct rte_pci_device *dev,
+@@ -67,5 +67,5 @@ pci_vfio_write_config(const struct rte_intr_handle *intr_handle,
@@ -34,2 +35,3 @@
--	return pwrite64(fd, buf, len, offset + offs);
-+	return pwrite(fd, buf, len, offset + offs);
+-	return pwrite64(vfio_dev_fd, buf, len,
++	return pwrite(vfio_dev_fd, buf, len,
+ 	       VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs);
@@ -36,0 +39 @@
+@@ -81,5 +81,5 @@ pci_vfio_get_msix_bar(int fd, struct pci_msix_table *msix_table)
@@ -38,16 +41,63 @@
-@@ -156,5 +156,5 @@ pci_vfio_enable_bus_memory(struct rte_pci_device *dev, int dev_fd)
- 	}
- 
--	ret = pread64(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND);
-+	ret = pread(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND);
- 
- 	if (ret != sizeof(cmd)) {
-@@ -167,5 +167,5 @@ pci_vfio_enable_bus_memory(struct rte_pci_device *dev, int dev_fd)
- 
- 	cmd |= RTE_PCI_COMMAND_MEMORY;
--	ret = pwrite64(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND);
-+	ret = pwrite(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND);
- 
- 	if (ret != sizeof(cmd)) {
-@@ -426,5 +426,5 @@ pci_vfio_is_ioport_bar(const struct rte_pci_device *dev, int vfio_dev_fd,
- 	}
+ 	/* read PCI capability pointer from config space */
+-	ret = pread64(fd, &reg, sizeof(reg),
++	ret = pread(fd, &reg, sizeof(reg),
+ 			VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
+ 			PCI_CAPABILITY_LIST);
+@@ -96,5 +96,5 @@ pci_vfio_get_msix_bar(int fd, struct pci_msix_table *msix_table)
+ 
+ 		/* read PCI capability ID */
+-		ret = pread64(fd, &reg, sizeof(reg),
++		ret = pread(fd, &reg, sizeof(reg),
+ 				VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
+ 				cap_offset);
+@@ -110,5 +110,5 @@ pci_vfio_get_msix_bar(int fd, struct pci_msix_table *msix_table)
+ 		/* if we haven't reached MSI-X, check next capability */
+ 		if (cap_id != PCI_CAP_ID_MSIX) {
+-			ret = pread64(fd, &reg, sizeof(reg),
++			ret = pread(fd, &reg, sizeof(reg),
+ 					VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
+ 					cap_offset);
+@@ -127,5 +127,5 @@ pci_vfio_get_msix_bar(int fd, struct pci_msix_table *msix_table)
+ 		else {
+ 			/* table offset resides in the next 4 bytes */
+-			ret = pread64(fd, &reg, sizeof(reg),
++			ret = pread(fd, &reg, sizeof(reg),
+ 					VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
+ 					cap_offset + 4);
+@@ -136,5 +136,5 @@ pci_vfio_get_msix_bar(int fd, struct pci_msix_table *msix_table)
+ 			}
+ 
+-			ret = pread64(fd, &flags, sizeof(flags),
++			ret = pread(fd, &flags, sizeof(flags),
+ 					VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
+ 					cap_offset + 2);
+@@ -163,5 +163,5 @@ pci_vfio_enable_bus_memory(int dev_fd)
+ 	int ret;
+ 
+-	ret = pread64(dev_fd, &cmd, sizeof(cmd),
++	ret = pread(dev_fd, &cmd, sizeof(cmd),
+ 		      VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
+ 		      PCI_COMMAND);
+@@ -176,5 +176,5 @@ pci_vfio_enable_bus_memory(int dev_fd)
+ 
+ 	cmd |= PCI_COMMAND_MEMORY;
+-	ret = pwrite64(dev_fd, &cmd, sizeof(cmd),
++	ret = pwrite(dev_fd, &cmd, sizeof(cmd),
+ 		       VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
+ 		       PCI_COMMAND);
+@@ -195,5 +195,5 @@ pci_vfio_set_bus_master(int dev_fd, bool op)
+ 	int ret;
+ 
+-	ret = pread64(dev_fd, &reg, sizeof(reg),
++	ret = pread(dev_fd, &reg, sizeof(reg),
+ 			VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
+ 			PCI_COMMAND);
+@@ -209,5 +209,5 @@ pci_vfio_set_bus_master(int dev_fd, bool op)
+ 		reg &= ~(PCI_COMMAND_MASTER);
+ 
+-	ret = pwrite64(dev_fd, &reg, sizeof(reg),
++	ret = pwrite(dev_fd, &reg, sizeof(reg),
+ 			VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
+ 			PCI_COMMAND);
+@@ -465,5 +465,5 @@ pci_vfio_is_ioport_bar(int vfio_dev_fd, int bar_index)
+ 	int ret;
@@ -57,3 +107,3 @@
- 			  offset + RTE_PCI_BASE_ADDRESS_0 + bar_index * 4);
- 	if (ret != sizeof(ioport_bar)) {
-@@ -1277,5 +1277,5 @@ pci_vfio_ioport_read(struct rte_pci_ioport *p,
+ 			  VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX)
+ 			  + PCI_BASE_ADDRESS_0 + bar_index*4);
+@@ -1134,5 +1134,5 @@ pci_vfio_ioport_read(struct rte_pci_ioport *p,
@@ -66 +116 @@
-@@ -1294,5 +1294,5 @@ pci_vfio_ioport_write(struct rte_pci_ioport *p,
+@@ -1151,5 +1151,5 @@ pci_vfio_ioport_write(struct rte_pci_ioport *p,
@@ -73,14 +122,0 @@
-@@ -1325,5 +1325,5 @@ pci_vfio_mmio_read(const struct rte_pci_device *dev, int bar,
- 		return -1;
- 
--	return pread64(fd, buf, len, offset + offs);
-+	return pread(fd, buf, len, offset + offs);
- }
- 
-@@ -1345,5 +1345,5 @@ pci_vfio_mmio_write(const struct rte_pci_device *dev, int bar,
- 		return -1;
- 
--	return pwrite64(fd, buf, len, offset + offs);
-+	return pwrite(fd, buf, len, offset + offs);
- }
-
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