patch 'common/mlx5: fix misalignment' has been queued to stable release 21.11.9

Kevin Traynor ktraynor at redhat.com
Wed Nov 27 18:18:56 CET 2024


Hi,

FYI, your patch has been queued to stable release 21.11.9

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 12/02/24. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable

This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/a8403f04b0d04ac2e44e4d41c3f5d114014a353f

Thanks.

Kevin

---
>From a8403f04b0d04ac2e44e4d41c3f5d114014a353f Mon Sep 17 00:00:00 2001
From: Shani Peretz <shperetz at nvidia.com>
Date: Tue, 12 Nov 2024 10:21:26 +0200
Subject: [PATCH] common/mlx5: fix misalignment

[ upstream commit 90967539d0d1afcfd5237ed85efdc430359a0e6b ]

ASan reported a runtime error due to misalignment
involving three structures.

The first issue arises when accessing
l_inconst->cache[MLX5_LIST_GLOBAL]->h.
If struct mlx5_list_cache is not properly aligned, the pointer gc,
assigned to l_inconst->cache[MLX5_LIST_GLOBAL], could be misaligned.
To address this, the __rte_aligned(16) attribute was added to
struct mlx5_list_inconst in struct mlx5_list, which includes struct
mlx5_list_cache, ensuring that the entire mlx5_list structure,
including mlx5_list_cache, is aligned to 64 bytes.

To resolve misalignment issues with struct mlx5_flow_handle,
The initialization of resources for the ipool ensures that
the ipool size is rounded up to the 8-byte boundary

The error in assigning values to actions[i] was due to potential
padding or misalignment in struct mlx5_modification_cmd.
To prevent such issues, the __rte_packed attribute was added to
struct mlx5_modification_cmd, ensuring that the structure is packed
without extra padding which helps avoid misaligned memory accesses.

Two performance degradation tests were conducted.
Following are the results comparing this commit to the most recent
commit in mlnx_dpdk_22.11 at that time (b69408ae453).

Before asan misalignment fix (average kflows/sec) -
Insertion - 4461.269, Deletion - 7799.9992
After:
Insertion - 4579.0642 , Deletion - 7913.0034

Fixes: 9a4c36880704 ("common/mlx5: optimize cache list object memory")

Signed-off-by: Shani Peretz <shperetz at nvidia.com>
Acked-by: Bing Zhao <bingz at nvidia.com>
---
 drivers/common/mlx5/mlx5_common_utils.h | 2 +-
 drivers/common/mlx5/mlx5_prm.h          | 4 ++--
 drivers/net/mlx5/mlx5.c                 | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/common/mlx5/mlx5_common_utils.h b/drivers/common/mlx5/mlx5_common_utils.h
index 98e487e7ef..2b013254ad 100644
--- a/drivers/common/mlx5/mlx5_common_utils.h
+++ b/drivers/common/mlx5/mlx5_common_utils.h
@@ -131,5 +131,5 @@ struct mlx5_list_inconst {
  *
  */
-struct mlx5_list {
+struct __rte_aligned(16) mlx5_list {
 	struct mlx5_list_const l_const;
 	struct mlx5_list_inconst l_inconst;
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index 58aa72df64..fd5c8b5c72 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -754,5 +754,5 @@ struct mlx5_modification_cmd {
 			unsigned int action_type:4;
 		};
-	};
+	} __rte_packed;
 	union {
 		uint32_t data1;
@@ -765,5 +765,5 @@ struct mlx5_modification_cmd {
 			unsigned int rsvd4:4;
 		};
-	};
+	} __rte_packed;
 };
 
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index b339ccce84..20960b8b03 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -832,5 +832,5 @@ mlx5_flow_ipool_create(struct mlx5_dev_ctx_shared *sh,
 		case MLX5_IPOOL_MLX5_FLOW:
 			cfg.size = config->dv_flow_en ?
-				sizeof(struct mlx5_flow_handle) :
+				RTE_ALIGN_MUL_CEIL(sizeof(struct mlx5_flow_handle), 8) :
 				MLX5_FLOW_HANDLE_VERBS_SIZE;
 			break;
-- 
2.47.0

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2024-11-27 17:17:41.691940689 +0000
+++ 0109-common-mlx5-fix-misalignment.patch	2024-11-27 17:17:38.338269959 +0000
@@ -1 +1 @@
-From 90967539d0d1afcfd5237ed85efdc430359a0e6b Mon Sep 17 00:00:00 2001
+From a8403f04b0d04ac2e44e4d41c3f5d114014a353f Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 90967539d0d1afcfd5237ed85efdc430359a0e6b ]
+
@@ -38 +39,0 @@
-Cc: stable at dpdk.org
@@ -49 +50 @@
-index c5eff7a0bf..9139bc6829 100644
+index 98e487e7ef..2b013254ad 100644
@@ -52 +53 @@
-@@ -132,5 +132,5 @@ struct mlx5_list_inconst {
+@@ -131,5 +131,5 @@ struct mlx5_list_inconst {
@@ -60 +61 @@
-index 210158350d..2d82807bc2 100644
+index 58aa72df64..fd5c8b5c72 100644
@@ -63 +64 @@
-@@ -942,5 +942,5 @@ struct mlx5_modification_cmd {
+@@ -754,5 +754,5 @@ struct mlx5_modification_cmd {
@@ -70 +71 @@
-@@ -953,5 +953,5 @@ struct mlx5_modification_cmd {
+@@ -765,5 +765,5 @@ struct mlx5_modification_cmd {
@@ -78 +79 @@
-index 52b90e6ff3..6e4473e2f4 100644
+index b339ccce84..20960b8b03 100644
@@ -81 +82 @@
-@@ -908,5 +908,5 @@ mlx5_flow_ipool_create(struct mlx5_dev_ctx_shared *sh)
+@@ -832,5 +832,5 @@ mlx5_flow_ipool_create(struct mlx5_dev_ctx_shared *sh,
@@ -83 +84 @@
- 			cfg.size = sh->config.dv_flow_en ?
+ 			cfg.size = config->dv_flow_en ?



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