[PATCH 10/13] docs: fix TSO and checksum offload feature status in ice doc
Bruce Richardson
bruce.richardson at intel.com
Thu Dec 11 12:58:33 CET 2025
On Tue, Dec 09, 2025 at 11:26:49AM +0000, Ciara Loftus wrote:
> TSO is only supported on the scalar path so change its status to
> partially supported. L3 and L4 checksum offload are enabled on scalar
> and vector paths so change their statuses from partial to supported.
>
> Fixes: f88de4694d94 ("net/ice: support Tx SSE vector")
> Cc: stable at dpdk.org
>
> Signed-off-by: Ciara Loftus <ciara.loftus at intel.com>
> ---
I still think we need a better solution for items only supported on scalar
paths, but until then let's keep the current scheme.
Acked-by: Bruce Richardson <bruce.richardson at intel.com>
> doc/guides/nics/features/ice.ini | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/doc/guides/nics/features/ice.ini b/doc/guides/nics/features/ice.ini
> index e9796c1eab..893d09e9ec 100644
> --- a/doc/guides/nics/features/ice.ini
> +++ b/doc/guides/nics/features/ice.ini
> @@ -21,7 +21,7 @@ Power mgmt address monitor = Y
> MTU update = Y
> Buffer split on Rx = P
> Scattered Rx = Y
> -TSO = Y
> +TSO = P
> Promiscuous mode = Y
> Allmulticast mode = Y
> DCB = Y
> @@ -34,8 +34,8 @@ Traffic manager = Y
> CRC offload = Y
> VLAN offload = Y
> QinQ offload = P
> -L3 checksum offload = P
> -L4 checksum offload = P
> +L3 checksum offload = Y
> +L4 checksum offload = Y
> Timestamp offload = P
> Inner L3 checksum = P
> Inner L4 checksum = P
> --
> 2.43.0
>
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