patch 'net/mlx5: fix GRE flow match with SWS' has been queued to stable release 22.11.8

[luca.boccassi at gmail.com]

Hi,

FYI, your patch has been queued to stable release 22.11.8

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 02/19/25. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/bluca/dpdk-stable

This queued commit can be viewed at:
https://github.com/bluca/dpdk-stable/commit/753eeb5b3dd93a0b6bb08c98f739c4143fc72250

Thanks.

Luca Boccassi

---
>From 753eeb5b3dd93a0b6bb08c98f739c4143fc72250 Mon Sep 17 00:00:00 2001
From: Maayan Kashani <mkashani at nvidia.com>
Date: Tue, 28 Jan 2025 09:59:30 +0200
Subject: [PATCH] net/mlx5: fix GRE flow match with SWS

[ upstream commit 05db99c117e36c0cd28cda8f558309efd20055da ]

The previous GRE fix was meant to handle HWS behavior
and changed the behavior for SWS causing degradation.

After the previous fix, in case of an empty GRE match,
GRE mask was initialized with protocol full mask,
Instead of the empty mask with protocol mask equals zero.

The current fix handles the SWS case as before the GRE fix,
and HWS according to the latest fix.
Also, combined common logic.

Fixes: 25ab2cbba31d ("net/mlx5: fix GRE flow item translation for root table")

Signed-off-by: Maayan Kashani <mkashani at nvidia.com>
Acked-by: Bing Zhao <bingz at nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_dv.c | 29 ++++++++++++++++-------------
 1 file changed, 16 insertions(+), 13 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 4e0ed4415f..7e9c22acb2 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -9108,23 +9108,26 @@ flow_dv_translate_item_gre(void *key, const struct rte_flow_item *item,
 	} gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
 	uint16_t protocol_m, protocol_v;
 
-	if (key_type & MLX5_SET_MATCHER_M) {
+	/* Common logic to SWS/HWS */
+	if (key_type & MLX5_SET_MATCHER_M)
 		MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, 0xff);
-		if (!gre_m)
-			gre_m = &rte_flow_item_gre_mask;
-		gre_v = gre_m;
-	} else {
+	else
 		MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
-			 IPPROTO_GRE);
-		if (!gre_v) {
-			gre_v = &empty_gre;
-			gre_m = &empty_gre;
-		} else if (!gre_m) {
+			IPPROTO_GRE);
+	/* HWS mask logic only */
+	if (key_type & MLX5_SET_MATCHER_HS_M) {
+		if (!gre_m)
 			gre_m = &rte_flow_item_gre_mask;
-		}
-		if (key_type == MLX5_SET_MATCHER_HS_V)
-			gre_m = gre_v;
+		gre_v = gre_m;
+	} else if (!gre_v) {
+		gre_v = &empty_gre;
+		gre_m = &empty_gre;
+	} else if (!gre_m) {
+		gre_m = &rte_flow_item_gre_mask;
 	}
+	/* SWS logic only */
+	if (key_type & MLX5_SET_MATCHER_SW_M)
+		gre_v = gre_m;
 	gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
 	gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
 	MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
-- 
2.47.2

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2025-02-17 16:13:18.041329609 +0000
+++ 0033-net-mlx5-fix-GRE-flow-match-with-SWS.patch	2025-02-17 16:13:16.834441592 +0000
@@ -1 +1 @@
-From 05db99c117e36c0cd28cda8f558309efd20055da Mon Sep 17 00:00:00 2001
+From 753eeb5b3dd93a0b6bb08c98f739c4143fc72250 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 05db99c117e36c0cd28cda8f558309efd20055da ]
+
@@ -18 +19,0 @@
-Cc: stable at dpdk.org
@@ -27 +28 @@
-index 41ebe0b61a..633c41e358 100644
+index 4e0ed4415f..7e9c22acb2 100644
@@ -30 +31 @@
-@@ -9839,23 +9839,26 @@ flow_dv_translate_item_gre(void *key, const struct rte_flow_item *item,
+@@ -9108,23 +9108,26 @@ flow_dv_translate_item_gre(void *key, const struct rte_flow_item *item,