patch 'crypto/dpaa2_sec: fix bitmask truncation' has been queued to stable release 23.11.4

Xueming Li xuemingl at nvidia.com
Tue Feb 18 13:35:14 CET 2025


Hi,

FYI, your patch has been queued to stable release 23.11.4

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
Please shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://git.dpdk.org/dpdk-stable/log/?h=23.11-staging

This queued commit can be viewed at:
https://git.dpdk.org/dpdk-stable/commit/?h=23.11-staging&id=ea50d3b95bb31fb24e608b3c9bb4811c7c5b2f54

Thanks.

Xueming Li <xuemingl at nvidia.com>

---
>From ea50d3b95bb31fb24e608b3c9bb4811c7c5b2f54 Mon Sep 17 00:00:00 2001
From: Stephen Hemminger <stephen at networkplumber.org>
Date: Wed, 5 Feb 2025 08:23:13 -0800
Subject: [PATCH] crypto/dpaa2_sec: fix bitmask truncation
Cc: Xueming Li <xuemingl at nvidia.com>

[ upstream commit 013ddc85bff5fdb85eb6006315ebdaa0c12eeece ]

The dqrr_held mask is 64 bit but updates were getting truncated
because 1 is of type int (32 bit) and the result shift of int is of
type int (32 bit); therefore any value >= 32 would get truncated.

Link: https://pvs-studio.com/en/blog/posts/cpp/1183/
Fixes: a77db24643b7 ("crypto/dpaa2_sec: support atomic queues")

Signed-off-by: Stephen Hemminger <stephen at networkplumber.org>
Acked-by: Hemant Agrawal <hemant.agrawal at nxp.com>
---
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index bd5590c02d..b9826c4fcf 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -1461,8 +1461,8 @@ dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
 			if (*dpaa2_seqn((*ops)->sym->m_src)) {
 				if (*dpaa2_seqn((*ops)->sym->m_src) & QBMAN_ENQUEUE_FLAG_DCA) {
 					DPAA2_PER_LCORE_DQRR_SIZE--;
-					DPAA2_PER_LCORE_DQRR_HELD &= ~(1 <<
-					*dpaa2_seqn((*ops)->sym->m_src) &
+					DPAA2_PER_LCORE_DQRR_HELD &= ~(UINT64_C(1) <<
+						*dpaa2_seqn((*ops)->sym->m_src) &
 					QBMAN_EQCR_DCA_IDXMASK);
 				}
 				flags[loop] = *dpaa2_seqn((*ops)->sym->m_src);
@@ -1751,7 +1751,7 @@ dpaa2_sec_set_enqueue_descriptor(struct dpaa2_queue *dpaa2_q,
 		dq_idx = *dpaa2_seqn(m) - 1;
 		qbman_eq_desc_set_dca(eqdesc, 1, dq_idx, 0);
 		DPAA2_PER_LCORE_DQRR_SIZE--;
-		DPAA2_PER_LCORE_DQRR_HELD &= ~(1 << dq_idx);
+		DPAA2_PER_LCORE_DQRR_HELD &= ~(UINT64_C(1) << dq_idx);
 	}
 	*dpaa2_seqn(m) = DPAA2_INVALID_MBUF_SEQN;
 }
@@ -4051,7 +4051,7 @@ dpaa2_sec_process_atomic_event(struct qbman_swp *swp __rte_unused,
 	dqrr_index = qbman_get_dqrr_idx(dq);
 	*dpaa2_seqn(crypto_op->sym->m_src) = QBMAN_ENQUEUE_FLAG_DCA | dqrr_index;
 	DPAA2_PER_LCORE_DQRR_SIZE++;
-	DPAA2_PER_LCORE_DQRR_HELD |= 1 << dqrr_index;
+	DPAA2_PER_LCORE_DQRR_HELD |= UINT64_C(1) << dqrr_index;
 	DPAA2_PER_LCORE_DQRR_MBUF(dqrr_index) = crypto_op->sym->m_src;
 	ev->event_ptr = crypto_op;
 }
--
2.34.1

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2025-02-18 19:39:03.449900662 +0800
+++ 0079-crypto-dpaa2_sec-fix-bitmask-truncation.patch	2025-02-18 19:39:00.718244032 +0800
@@ -1 +1 @@
-From 013ddc85bff5fdb85eb6006315ebdaa0c12eeece Mon Sep 17 00:00:00 2001
+From ea50d3b95bb31fb24e608b3c9bb4811c7c5b2f54 Mon Sep 17 00:00:00 2001
@@ -4,0 +5,3 @@
+Cc: Xueming Li <xuemingl at nvidia.com>
+
+[ upstream commit 013ddc85bff5fdb85eb6006315ebdaa0c12eeece ]
@@ -12 +14,0 @@
-Cc: stable at dpdk.org
@@ -21 +23 @@
-index ec6577f64c..7ad8fd47dd 100644
+index bd5590c02d..b9826c4fcf 100644
@@ -24 +26 @@
-@@ -1491,8 +1491,8 @@ dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
+@@ -1461,8 +1461,8 @@ dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
@@ -35 +37 @@
-@@ -1772,7 +1772,7 @@ dpaa2_sec_set_enqueue_descriptor(struct dpaa2_queue *dpaa2_q,
+@@ -1751,7 +1751,7 @@ dpaa2_sec_set_enqueue_descriptor(struct dpaa2_queue *dpaa2_q,
@@ -44 +46 @@
-@@ -4055,7 +4055,7 @@ dpaa2_sec_process_atomic_event(struct qbman_swp *swp __rte_unused,
+@@ -4051,7 +4051,7 @@ dpaa2_sec_process_atomic_event(struct qbman_swp *swp __rte_unused,


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