patch 'net/mlx5/hws: fix crash using represented port without ID' has been queued to stable release 22.11.8

[luca.boccassi at gmail.com]

Hi,

FYI, your patch has been queued to stable release 22.11.8

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 03/21/25. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/bluca/dpdk-stable

This queued commit can be viewed at:
https://github.com/bluca/dpdk-stable/commit/421ec973fa0ba851250becfe1b73ec77bc0c807c

Thanks.

Luca Boccassi

---
>From 421ec973fa0ba851250becfe1b73ec77bc0c807c Mon Sep 17 00:00:00 2001
From: Maayan Kashani <mkashani at nvidia.com>
Date: Thu, 27 Feb 2025 12:33:29 +0200
Subject: [PATCH] net/mlx5/hws: fix crash using represented port without ID

[ upstream commit 1de93ca6aee6acb785c8080f84da26b09835af0f ]

For non-template API on top of HWS, when trying to use
represented-port item w/o setting the ethdev_port_id,
it crashes.

Added default values to match the case for SWS.
Default port is now eswitch manager id.

Fixes: c55c2bf35333 ("net/mlx5/hws: add definer layer")

Signed-off-by: Maayan Kashani <mkashani at nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski at nvidia.com>
---
 drivers/net/mlx5/hws/mlx5dr_definer.c | 14 ++++++--------
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c
index bc1decbec9..805025184c 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -392,10 +392,11 @@ mlx5dr_definer_vport_set(struct mlx5dr_definer_fc *fc,
 			 uint8_t *tag)
 {
 	const struct rte_flow_item_ethdev *v = item_spec;
-	const struct flow_hw_port_info *port_info;
+	const struct flow_hw_port_info *port_info = NULL;
 	uint32_t regc_value;
 
-	port_info = flow_hw_conv_port_id(v->port_id);
+	if (v)
+		port_info = flow_hw_conv_port_id(v->port_id);
 	if (unlikely(!port_info))
 		regc_value = BAD_PORT;
 	else
@@ -977,11 +978,12 @@ mlx5dr_definer_conv_item_port(struct mlx5dr_definer_conv_data *cd,
 			      struct rte_flow_item *item,
 			      int item_idx)
 {
-	const struct rte_flow_item_ethdev *m = item->mask;
+	uint16_t port_id = item->mask ?
+			   ((const struct rte_flow_item_ethdev *)(item->mask))->port_id : 0;
 	struct mlx5dr_definer_fc *fc;
 	uint8_t bit_offset = 0;
 
-	if (m->port_id) {
+	if (port_id) {
 		if (!cd->caps->wire_regc_mask) {
 			DR_LOG(ERR, "Port ID item not supported, missing wire REGC mask");
 			rte_errno = ENOTSUP;
@@ -998,10 +1000,6 @@ mlx5dr_definer_conv_item_port(struct mlx5dr_definer_conv_data *cd,
 		DR_CALC_SET_HDR(fc, registers, register_c_0);
 		fc->bit_off = bit_offset;
 		fc->bit_mask = cd->caps->wire_regc_mask >> bit_offset;
-	} else {
-		DR_LOG(ERR, "Pord ID item mask must specify ID mask");
-		rte_errno = EINVAL;
-		return rte_errno;
 	}
 
 	return 0;
-- 
2.47.2

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2025-03-19 14:20:57.304059510 +0000
+++ 0006-net-mlx5-hws-fix-crash-using-represented-port-withou.patch	2025-03-19 14:20:57.057288838 +0000
@@ -1 +1 @@
-From 1de93ca6aee6acb785c8080f84da26b09835af0f Mon Sep 17 00:00:00 2001
+From 421ec973fa0ba851250becfe1b73ec77bc0c807c Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 1de93ca6aee6acb785c8080f84da26b09835af0f ]
+
@@ -14 +15,0 @@
-Cc: stable at dpdk.org
@@ -23 +24 @@
-index 98d670fc1c..a4b9306d2b 100644
+index bc1decbec9..805025184c 100644
@@ -26 +27 @@
-@@ -772,10 +772,11 @@ mlx5dr_definer_vport_set(struct mlx5dr_definer_fc *fc,
+@@ -392,10 +392,11 @@ mlx5dr_definer_vport_set(struct mlx5dr_definer_fc *fc,
@@ -34 +35 @@
--	port_info = flow_hw_conv_port_id(fc->dr_ctx, v->port_id);
+-	port_info = flow_hw_conv_port_id(v->port_id);
@@ -36 +37 @@
-+		port_info = flow_hw_conv_port_id(fc->dr_ctx, v->port_id);
++		port_info = flow_hw_conv_port_id(v->port_id);
@@ -40 +41,2 @@
-@@ -1585,10 +1586,11 @@ mlx5dr_definer_conv_item_port(struct mlx5dr_definer_conv_data *cd,
+@@ -977,11 +978,12 @@ mlx5dr_definer_conv_item_port(struct mlx5dr_definer_conv_data *cd,
+ 			      struct rte_flow_item *item,
@@ -43 +44,0 @@
- 	struct mlx5dr_cmd_query_caps *caps = cd->ctx->caps;
@@ -47,0 +49 @@
+ 	uint8_t bit_offset = 0;
@@ -51 +53 @@
- 		if (!caps->wire_regc_mask) {
+ 		if (!cd->caps->wire_regc_mask) {
@@ -54,4 +56,4 @@
-@@ -1603,10 +1605,6 @@ mlx5dr_definer_conv_item_port(struct mlx5dr_definer_conv_data *cd,
- 		fc->bit_off = rte_ctz32(caps->wire_regc_mask);
- 		fc->bit_mask = caps->wire_regc_mask >> fc->bit_off;
- 		fc->dr_ctx = cd->ctx;
+@@ -998,10 +1000,6 @@ mlx5dr_definer_conv_item_port(struct mlx5dr_definer_conv_data *cd,
+ 		DR_CALC_SET_HDR(fc, registers, register_c_0);
+ 		fc->bit_off = bit_offset;
+ 		fc->bit_mask = cd->caps->wire_regc_mask >> bit_offset;