patch 'net/mlx5: fix hairpin queue release' has been queued to stable release 24.11.2

[Kevin Traynor]

Hi,

FYI, your patch has been queued to stable release 24.11.2

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 03/28/25. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable

This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/3d96eb2c96a25adc97ad9977916af10a01f95680

Thanks.

Kevin

---
>From 3d96eb2c96a25adc97ad9977916af10a01f95680 Mon Sep 17 00:00:00 2001
From: Maayan Kashani <mkashani at nvidia.com>
Date: Thu, 27 Feb 2025 12:14:14 +0200
Subject: [PATCH] net/mlx5: fix hairpin queue release

[ upstream commit 6886b5f39d66770fb7e233fa1c8fc74ed1935116 ]

Fix an assert failure that occurs when releasing a hairpin queue. The issue
arises from incorrect handling of shared Rx queues during release.

Fixes: 09c2555303be ("net/mlx5: support shared Rx queue")

Signed-off-by: Maayan Kashani <mkashani at nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski at nvidia.com>
---
 drivers/net/mlx5/mlx5.h      |  1 +
 drivers/net/mlx5/mlx5_flow.c |  4 ++--
 drivers/net/mlx5/mlx5_rx.h   |  1 +
 drivers/net/mlx5/mlx5_rxq.c  | 12 ++++++++----
 4 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 89d277b523..21df917d6f 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -2005,4 +2005,5 @@ struct mlx5_priv {
 	rte_spinlock_t flow_list_lock;
 	struct mlx5_obj_ops obj_ops; /* HW objects operations. */
+	LIST_HEAD(rxq, mlx5_rxq_ctrl) rxqsctrl; /* DPDK Rx queues. */
 	LIST_HEAD(rxqobj, mlx5_rxq_obj) rxqsobj; /* Verbs/DevX Rx queues. */
 	struct mlx5_list *hrxqs; /* Hash Rx queues. */
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index 936a82e524..9678c94ff3 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -1649,5 +1649,5 @@ flow_rxq_mark_flag_set(struct rte_eth_dev *dev)
 			    opriv->mark_enabled)
 				continue;
-			LIST_FOREACH(rxq_ctrl, &opriv->sh->shared_rxqs, share_entry) {
+			LIST_FOREACH(rxq_ctrl, &opriv->rxqsctrl, next) {
 				rxq_ctrl->rxq.mark = 1;
 			}
@@ -1655,5 +1655,5 @@ flow_rxq_mark_flag_set(struct rte_eth_dev *dev)
 		}
 	} else {
-		LIST_FOREACH(rxq_ctrl, &priv->sh->shared_rxqs, share_entry) {
+		LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
 			rxq_ctrl->rxq.mark = 1;
 		}
diff --git a/drivers/net/mlx5/mlx5_rx.h b/drivers/net/mlx5/mlx5_rx.h
index 1a6f174c40..6c48a37be7 100644
--- a/drivers/net/mlx5/mlx5_rx.h
+++ b/drivers/net/mlx5/mlx5_rx.h
@@ -152,4 +152,5 @@ struct __rte_cache_aligned mlx5_rxq_data {
 struct mlx5_rxq_ctrl {
 	struct mlx5_rxq_data rxq; /* Data path structure. */
+	LIST_ENTRY(mlx5_rxq_ctrl) next; /* Pointer to the next element. */
 	LIST_HEAD(priv, mlx5_rxq_priv) owners; /* Owner rxq list. */
 	struct mlx5_rxq_obj *obj; /* Verbs/DevX elements. */
diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index 126b1970e6..6047529535 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -1038,4 +1038,5 @@ mlx5_rx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t idx,
 		return -rte_errno;
 	}
+	rte_atomic_fetch_add_explicit(&rxq_ctrl->ctrl_ref, 1, rte_memory_order_relaxed);
 	DRV_LOG(DEBUG, "port %u adding hairpin Rx queue %u to list",
 		dev->data->port_id, idx);
@@ -1971,6 +1972,7 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
 		tmpl->share_group = conf->share_group;
 		tmpl->share_qid = conf->share_qid;
+		LIST_INSERT_HEAD(&priv->sh->shared_rxqs, tmpl, share_entry);
 	}
-	LIST_INSERT_HEAD(&priv->sh->shared_rxqs, tmpl, share_entry);
+	LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
 	rte_atomic_store_explicit(&tmpl->ctrl_ref, 1, rte_memory_order_relaxed);
 	return tmpl;
@@ -2026,5 +2028,5 @@ mlx5_rxq_hairpin_new(struct rte_eth_dev *dev, struct mlx5_rxq_priv *rxq,
 	rxq->hairpin_conf = *hairpin_conf;
 	mlx5_rxq_ref(dev, idx);
-	LIST_INSERT_HEAD(&priv->sh->shared_rxqs, tmpl, share_entry);
+	LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
 	rte_atomic_store_explicit(&tmpl->ctrl_ref, 1, rte_memory_order_relaxed);
 	return tmpl;
@@ -2301,5 +2303,7 @@ mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
 				mlx5_mr_btree_free
 					(&rxq_ctrl->rxq.mr_ctrl.cache_bh);
-			LIST_REMOVE(rxq_ctrl, share_entry);
+			if (rxq_ctrl->rxq.shared)
+				LIST_REMOVE(rxq_ctrl, share_entry);
+			LIST_REMOVE(rxq_ctrl, next);
 			mlx5_free(rxq_ctrl);
 		}
@@ -2327,5 +2331,5 @@ mlx5_rxq_verify(struct rte_eth_dev *dev)
 	int ret = 0;
 
-	LIST_FOREACH(rxq_ctrl, &priv->sh->shared_rxqs, share_entry) {
+	LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
 		DRV_LOG(DEBUG, "port %u Rx Queue %u still referenced",
 			dev->data->port_id, rxq_ctrl->rxq.idx);
-- 
2.48.1

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2025-03-24 16:15:15.098927283 +0000
+++ 0008-net-mlx5-fix-hairpin-queue-release.patch	2025-03-24 16:15:14.724735394 +0000
@@ -1 +1 @@
-From 6886b5f39d66770fb7e233fa1c8fc74ed1935116 Mon Sep 17 00:00:00 2001
+From 3d96eb2c96a25adc97ad9977916af10a01f95680 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 6886b5f39d66770fb7e233fa1c8fc74ed1935116 ]
+
@@ -10 +11,0 @@
-Cc: stable at dpdk.org
@@ -22 +23 @@
-index 545ba48b3c..6df99c25e2 100644
+index 89d277b523..21df917d6f 100644
@@ -25 +26 @@
-@@ -2024,4 +2024,5 @@ struct mlx5_priv {
+@@ -2005,4 +2005,5 @@ struct mlx5_priv {
@@ -32 +33 @@
-index f8b3e504b3..6169ebc13f 100644
+index 936a82e524..9678c94ff3 100644
@@ -50 +51 @@
-index f80a2e3227..6380895502 100644
+index 1a6f174c40..6c48a37be7 100644
@@ -53 +54 @@
-@@ -170,4 +170,5 @@ struct __rte_cache_aligned mlx5_rxq_data {
+@@ -152,4 +152,5 @@ struct __rte_cache_aligned mlx5_rxq_data {
@@ -60 +61 @@
-index a5971b5cdd..5cf7d4971b 100644
+index 126b1970e6..6047529535 100644
@@ -69 +70 @@
-@@ -2007,6 +2008,7 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
+@@ -1971,6 +1972,7 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
@@ -78 +79 @@
-@@ -2062,5 +2064,5 @@ mlx5_rxq_hairpin_new(struct rte_eth_dev *dev, struct mlx5_rxq_priv *rxq,
+@@ -2026,5 +2028,5 @@ mlx5_rxq_hairpin_new(struct rte_eth_dev *dev, struct mlx5_rxq_priv *rxq,
@@ -85 +86 @@
-@@ -2337,5 +2339,7 @@ mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
+@@ -2301,5 +2303,7 @@ mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
@@ -94 +95 @@
-@@ -2363,5 +2367,5 @@ mlx5_rxq_verify(struct rte_eth_dev *dev)
+@@ -2327,5 +2331,5 @@ mlx5_rxq_verify(struct rte_eth_dev *dev)