patch 'net/ena: fix PCI BAR mapping on 64K page size' has been queued to stable release 22.11.11
    luca.boccassi at gmail.com 
    luca.boccassi at gmail.com
       
    Mon Oct 27 17:19:46 CET 2025
    
    
  
Hi,
FYI, your patch has been queued to stable release 22.11.11
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 10/29/25. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/bluca/dpdk-stable
This queued commit can be viewed at:
https://github.com/bluca/dpdk-stable/commit/a27f262b008305bdf84343509f9a70c13c1e16c5
Thanks.
Luca Boccassi
---
>From a27f262b008305bdf84343509f9a70c13c1e16c5 Mon Sep 17 00:00:00 2001
From: Shai Brandes <shaibran at amazon.com>
Date: Wed, 15 Oct 2025 15:09:16 +0300
Subject: [PATCH] net/ena: fix PCI BAR mapping on 64K page size
[ upstream commit c71e3fbee65637084e1e42500e9e6300d50f467b ]
On 64K page systems, DPDK `pci_uio` driver aligns the physical address
to a 64K boundary before assigning a virtual address.
If the original physical BAR address is not 64K-aligned,
this adjustment leads to an incorrect mapping.
This patch ensures the BAR virtual address received in the driver accounts
for both PAGE size and BAR physical offset to correctly map each BAR.
The fix is compatible for every PAGE size, applies to every used BAR,
and supports both 32/64 bit DPDK builds.
Example issue:
- BAR0 physical address: 0x80208000 (not 64K-aligned)
- DPDK aligned physical address: 0x80208000 -> 0x80200000
  (masking 0x8000 offset)
- DPDK mapped physical to virtual address: 0x80200000 -> 0x1140000000
- Driver accessed BAR0 virtual address = 0x1140000000
  (causing init failure)
- Resolution is to add correct offset to driver BAR0 address:
  0x1140000000 + 0x8000
Fixes: 1173fca25af9 ("ena: add polling-mode driver")
Signed-off-by: Amit Bernstein <amitbern at amazon.com>
Signed-off-by: Shai Brandes <shaibran at amazon.com>
Reviewed-by: Yosef Raisman <yraisman at amazon.com>
---
 drivers/net/ena/ena_ethdev.c | 28 ++++++++++++++++++++++++----
 1 file changed, 24 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c
index e640bbae3d..079fc23f05 100644
--- a/drivers/net/ena/ena_ethdev.c
+++ b/drivers/net/ena/ena_ethdev.c
@@ -8,6 +8,7 @@
 #include <rte_version.h>
 #include <rte_net.h>
 #include <rte_kvargs.h>
+#include <rte_eal_paging.h>
 
 #include "ena_ethdev.h"
 #include "ena_logs.h"
@@ -2084,6 +2085,24 @@ static int ena_init_once(void)
 	return 0;
 }
 
+/*
+ * Returns PCI BAR virtual address.
+ * If the physical address is not page-aligned,
+ * adjusts the virtual address by the page offset.
+ * Assumes page size is a power of 2.
+ */
+static void *pci_bar_addr(struct rte_pci_device *dev, uint32_t bar)
+{
+	const struct rte_mem_resource *res = &dev->mem_resource[bar];
+	size_t offset = res->phys_addr % rte_mem_page_size();
+	void *vaddr = RTE_PTR_ADD(res->addr, offset);
+
+	PMD_INIT_LOG(INFO, "PCI BAR [%u]: phys_addr=0x%" PRIx64 ", addr=%p, offset=0x%zx, adjusted_addr=%p\n",
+		bar, res->phys_addr, res->addr, offset, vaddr);
+
+	return vaddr;
+}
+
 static int eth_ena_dev_init(struct rte_eth_dev *eth_dev)
 {
 	struct ena_calc_queue_size_ctx calc_queue_ctx = { 0 };
@@ -2128,16 +2147,17 @@ static int eth_ena_dev_init(struct rte_eth_dev *eth_dev)
 
 	intr_handle = pci_dev->intr_handle;
 
-	adapter->regs = pci_dev->mem_resource[ENA_REGS_BAR].addr;
-	adapter->dev_mem_base = pci_dev->mem_resource[ENA_MEM_BAR].addr;
-
+	adapter->regs = pci_bar_addr(pci_dev, ENA_REGS_BAR);
 	if (!adapter->regs) {
 		PMD_INIT_LOG(CRIT, "Failed to access registers BAR(%d)\n",
 			     ENA_REGS_BAR);
 		return -ENXIO;
 	}
-
 	ena_dev->reg_bar = adapter->regs;
+
+	/* Memory BAR may be NULL on non LLQ supported devices */
+	adapter->dev_mem_base = pci_bar_addr(pci_dev, ENA_MEM_BAR);
+
 	/* Pass device data as a pointer which can be passed to the IO functions
 	 * by the ena_com (for example - the memory allocation).
 	 */
-- 
2.47.3
---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2025-10-27 15:54:37.270665819 +0000
+++ 0068-net-ena-fix-PCI-BAR-mapping-on-64K-page-size.patch	2025-10-27 15:54:34.843950754 +0000
@@ -1 +1 @@
-From c71e3fbee65637084e1e42500e9e6300d50f467b Mon Sep 17 00:00:00 2001
+From a27f262b008305bdf84343509f9a70c13c1e16c5 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit c71e3fbee65637084e1e42500e9e6300d50f467b ]
+
@@ -27 +28,0 @@
-Cc: stable at dpdk.org
@@ -33,16 +34,3 @@
- doc/guides/rel_notes/release_25_11.rst |  1 +
- drivers/net/ena/ena_ethdev.c           | 28 ++++++++++++++++++++++----
- 2 files changed, 25 insertions(+), 4 deletions(-)
-
-diff --git a/doc/guides/rel_notes/release_25_11.rst b/doc/guides/rel_notes/release_25_11.rst
-index 94e5182016..863d111c8d 100644
---- a/doc/guides/rel_notes/release_25_11.rst
-+++ b/doc/guides/rel_notes/release_25_11.rst
-@@ -109,6 +109,7 @@ New Features
- * **Updated Amazon ENA (Elastic Network Adapter) ethernet driver.**
- 
-   * Added support for retrieving HW timestamps for Rx packets with nanosecond resolution.
-+  * Fixed PCI BAR mapping on 64K page size.
- 
- * **Added Huawei hinic3 ethernet driver.**
- 
+ drivers/net/ena/ena_ethdev.c | 28 ++++++++++++++++++++++++----
+ 1 file changed, 24 insertions(+), 4 deletions(-)
+
@@ -50 +38 @@
-index 5147a754b2..aaa4feb11b 100644
+index e640bbae3d..079fc23f05 100644
@@ -53 +41 @@
-@@ -9,6 +9,7 @@
+@@ -8,6 +8,7 @@
@@ -61 +49 @@
-@@ -2364,6 +2365,24 @@ static int ena_init_once(void)
+@@ -2084,6 +2085,24 @@ static int ena_init_once(void)
@@ -77 +65 @@
-+	PMD_INIT_LOG_LINE(INFO, "PCI BAR [%u]: phys_addr=0x%" PRIx64 ", addr=%p, offset=0x%zx, adjusted_addr=%p",
++	PMD_INIT_LOG(INFO, "PCI BAR [%u]: phys_addr=0x%" PRIx64 ", addr=%p, offset=0x%zx, adjusted_addr=%p\n",
@@ -86 +74 @@
-@@ -2409,16 +2428,17 @@ static int eth_ena_dev_init(struct rte_eth_dev *eth_dev)
+@@ -2128,16 +2147,17 @@ static int eth_ena_dev_init(struct rte_eth_dev *eth_dev)
@@ -95 +83 @@
- 		PMD_INIT_LOG_LINE(CRIT, "Failed to access registers BAR(%d)",
+ 		PMD_INIT_LOG(CRIT, "Failed to access registers BAR(%d)\n",
    
    
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