patch 'net/e1000: use device timestamp for clock read in igc' has been queued to stable release 24.11.5

[luca.boccassi at gmail.com]

Hi,

FYI, your patch has been queued to stable release 24.11.5

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 02/22/26. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/bluca/dpdk-stable

This queued commit can be viewed at:
https://github.com/bluca/dpdk-stable/commit/83740db7561c27e2a710cac67453a89af2d422bd

Thanks.

Luca Boccassi

---
>From 83740db7561c27e2a710cac67453a89af2d422bd Mon Sep 17 00:00:00 2001
From: Song Yoong Siang <yoong.siang.song at intel.com>
Date: Sat, 8 Nov 2025 16:06:13 +0800
Subject: [PATCH] net/e1000: use device timestamp for clock read in igc

[ upstream commit f2930bafb22d6a31c2e78cf096c72179c1d4c1b6 ]

Change eth_igc_read_clock() to read from hardware timestamp registers
(E1000_SYSTIML/E1000_SYSTIMH) instead of using system clock_gettime().

This ensures that the clock reading is consistent with the hardware's
internal time base used for Qbv cycle and launch time scheduling,
providing better accuracy for Time-Sensitive Networking applications.

Fixes: 9630f7c71ecd ("net/igc: enable launch time offloading")

Signed-off-by: David Zage <david.zage at intel.com>
Signed-off-by: Song Yoong Siang <yoong.siang.song at intel.com>
Acked-by: Bruce Richardson <bruce.richardson at intel.com>
---
 .mailmap                     |  2 ++
 drivers/net/igc/igc_ethdev.c | 12 +++++++++---
 2 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/.mailmap b/.mailmap
index e676eeb6cd..0ddb7d8075 100644
--- a/.mailmap
+++ b/.mailmap
@@ -339,6 +339,7 @@ David Riddoch <driddoch at solarflare.com>
 David Su <david.w.su at intel.com>
 David Verbeiren <david.verbeiren at intel.com>
 David Wilder <dwilder at us.ibm.com>
+David Zage <david.zage at intel.com>
 David Zeng <zengxhsh at cn.ibm.com>
 Dawid Gorecki <dgr at semihalf.com>
 Dawid Jurczak <dawid_jurek at vp.pl>
@@ -1467,6 +1468,7 @@ Solal Pirelli <solal.pirelli at gmail.com>
 Solganik Alexander <sashas at lightbitslabs.com>
 Somnath Kotur <somnath.kotur at broadcom.com>
 Song Jiale <songx.jiale at intel.com>
+Song Yoong Siang <yoong.siang.song at intel.com>
 Song Zhu <song.zhu at arm.com>
 Sony Chacko <sony.chacko at qlogic.com>
 Sotiris Salloumis <sotiris.salloumis at ericsson.com>
diff --git a/drivers/net/igc/igc_ethdev.c b/drivers/net/igc/igc_ethdev.c
index 34c5951cfa..a5143251a2 100644
--- a/drivers/net/igc/igc_ethdev.c
+++ b/drivers/net/igc/igc_ethdev.c
@@ -2806,6 +2806,12 @@ eth_igc_timesync_read_time(struct rte_eth_dev *dev, struct timespec *ts)
 {
 	struct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);
 
+	/*
+	 * Reading the SYSTIML register latches the upper 32 bits to the SYSTIMH
+	 * shadow register for coherent access. As long as we read SYSTIML first
+	 * followed by SYSTIMH, we avoid race conditions where the time rolls
+	 * over between the two register reads.
+	 */
 	ts->tv_nsec = IGC_READ_REG(hw, IGC_SYSTIML);
 	ts->tv_sec = IGC_READ_REG(hw, IGC_SYSTIMH);
 
@@ -2965,10 +2971,10 @@ eth_igc_timesync_disable(struct rte_eth_dev *dev)
 static int
 eth_igc_read_clock(__rte_unused struct rte_eth_dev *dev, uint64_t *clock)
 {
-	struct timespec system_time;
+	struct timespec ts;
 
-	clock_gettime(CLOCK_REALTIME, &system_time);
-	*clock = system_time.tv_sec * NSEC_PER_SEC + system_time.tv_nsec;
+	eth_igc_timesync_read_time(dev, &ts);
+	*clock = rte_timespec_to_ns(&ts);
 
 	return 0;
 }
-- 
2.47.3

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2026-02-20 14:55:45.022649575 +0000
+++ 0045-net-e1000-use-device-timestamp-for-clock-read-in-igc.patch	2026-02-20 14:55:43.224191413 +0000
@@ -1 +1 @@
-From f2930bafb22d6a31c2e78cf096c72179c1d4c1b6 Mon Sep 17 00:00:00 2001
+From 83740db7561c27e2a710cac67453a89af2d422bd Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit f2930bafb22d6a31c2e78cf096c72179c1d4c1b6 ]
+
@@ -14 +15,0 @@
-Cc: stable at dpdk.org
@@ -20,2 +21,2 @@
- .mailmap                             |  2 ++
- drivers/net/intel/e1000/igc_ethdev.c | 12 +++++++++---
+ .mailmap                     |  2 ++
+ drivers/net/igc/igc_ethdev.c | 12 +++++++++---
@@ -25 +26 @@
-index 4b7e3b9eb0..6a6d76dd87 100644
+index e676eeb6cd..0ddb7d8075 100644
@@ -28 +29 @@
-@@ -351,6 +351,7 @@ David Riddoch <driddoch at solarflare.com>
+@@ -339,6 +339,7 @@ David Riddoch <driddoch at solarflare.com>
@@ -34 +34,0 @@
- Davide Caratti <dcaratti at redhat.com>
@@ -36 +36,2 @@
-@@ -1527,6 +1528,7 @@ Solal Pirelli <solal.pirelli at gmail.com>
+ Dawid Jurczak <dawid_jurek at vp.pl>
+@@ -1467,6 +1468,7 @@ Solal Pirelli <solal.pirelli at gmail.com>
@@ -44,5 +45,5 @@
-diff --git a/drivers/net/intel/e1000/igc_ethdev.c b/drivers/net/intel/e1000/igc_ethdev.c
-index 47a91fe38e..cfcf7cad28 100644
---- a/drivers/net/intel/e1000/igc_ethdev.c
-+++ b/drivers/net/intel/e1000/igc_ethdev.c
-@@ -2813,6 +2813,12 @@ eth_igc_timesync_read_time(struct rte_eth_dev *dev, struct timespec *ts)
+diff --git a/drivers/net/igc/igc_ethdev.c b/drivers/net/igc/igc_ethdev.c
+index 34c5951cfa..a5143251a2 100644
+--- a/drivers/net/igc/igc_ethdev.c
++++ b/drivers/net/igc/igc_ethdev.c
+@@ -2806,6 +2806,12 @@ eth_igc_timesync_read_time(struct rte_eth_dev *dev, struct timespec *ts)
@@ -50 +51 @@
- 	struct e1000_hw *hw = IGC_DEV_PRIVATE_HW(dev);
+ 	struct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);
@@ -58,2 +59,2 @@
- 	ts->tv_nsec = E1000_READ_REG(hw, E1000_SYSTIML);
- 	ts->tv_sec = E1000_READ_REG(hw, E1000_SYSTIMH);
+ 	ts->tv_nsec = IGC_READ_REG(hw, IGC_SYSTIML);
+ 	ts->tv_sec = IGC_READ_REG(hw, IGC_SYSTIMH);
@@ -61 +62 @@
-@@ -2972,10 +2978,10 @@ eth_igc_timesync_disable(struct rte_eth_dev *dev)
+@@ -2965,10 +2971,10 @@ eth_igc_timesync_disable(struct rte_eth_dev *dev)