patch 'net/mlx5: fix flow devargs handling for future HW' has been queued to stable release 25.11.1
Kevin Traynor
ktraynor at redhat.com
Thu Feb 26 14:09:53 CET 2026
Hi,
FYI, your patch has been queued to stable release 25.11.1
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 03/02/26. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/1f535eaf487c1dd331f0c581215b5d9eb714eed8
Thanks.
Kevin
---
>From 1f535eaf487c1dd331f0c581215b5d9eb714eed8 Mon Sep 17 00:00:00 2001
From: Maayan Kashani <mkashani at nvidia.com>
Date: Mon, 12 Jan 2026 11:24:35 +0200
Subject: [PATCH] net/mlx5: fix flow devargs handling for future HW
[ upstream commit 170ebe941be3a4c2a2bddeff039d62088d2c6463 ]
SWS (software steering) will be disabled on future hardware generations.
This fix should check for SWS capability bits and return relevant error.
Update the defaults for the dv_flow_en and allow_duplicate_pattern
devargs accordingly.
- Default dv_flow_en devarg value will be chosen based on whether
NIC supports SW steering and/or HW steering.
- If DV flow is not supported and allow_duplicate_pattern is
set by the user, forcibly disable it and emit a clear log message.
This change improves reliability by ensuring only valid
configurations are applied, and provides clear feedback to
the user when fallbacks are triggered.
Fixes: 1b55eeb7b76f ("common/mlx5: add ConnectX-9 SuperNIC")
Signed-off-by: Maayan Kashani <mkashani at nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski at nvidia.com>
---
doc/guides/nics/mlx5.rst | 12 +++--
drivers/common/mlx5/mlx5_devx_cmds.c | 18 +++++++
drivers/common/mlx5/mlx5_devx_cmds.h | 6 +++
drivers/common/mlx5/mlx5_prm.h | 14 ++++--
drivers/net/mlx5/mlx5.c | 71 +++++++++++++++++++++++++++-
5 files changed, 112 insertions(+), 9 deletions(-)
diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 904a0ac358..a1c23fbf8b 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -699,6 +699,9 @@ for an additional list of options shared with other mlx5 drivers.
In this mode, only queue-based flow management is supported.
- It is configured by default to 1 (DV flow steering) if supported.
- Otherwise, the value is 0 which indicates legacy Verbs flow offloading.
+ By default, the PMD will set this value according to capability.
+ If DV flow steering is supported, it will be set to 1.
+ If DV flow steering is not supported and HW steering is supported,
+ then it will be set to 2.
+ Otherwise, it will be set to 0.
- ``dv_esw_en`` parameter [int]
@@ -836,5 +839,8 @@ for an additional list of options shared with other mlx5 drivers.
the next rule takes effect only if the previous rules are deleted.
- By default, the PMD will set this value to 1.
+ This option is not supported in :ref:`HWS mode <mlx5_hws>`.
+ If this option is set to 1 in HWS mode, it will be reset to 0.
+
+ By default, the PMD will set this value according to capability.
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c
index d885a95c04..d12ebf8487 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.c
+++ b/drivers/common/mlx5/mlx5_devx_cmds.c
@@ -1305,4 +1305,16 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
attr->set_reg_c &= (rx_reg & tx_reg);
+ attr->rx_sw_owner_v2 = MLX5_GET(flow_table_nic_cap, hcattr,
+ flow_table_properties_nic_receive.sw_owner_v2);
+ if (!attr->rx_sw_owner_v2)
+ attr->rx_sw_owner = MLX5_GET(flow_table_nic_cap, hcattr,
+ flow_table_properties_nic_receive.sw_owner);
+
+ attr->tx_sw_owner_v2 = MLX5_GET(flow_table_nic_cap, hcattr,
+ flow_table_properties_nic_transmit.sw_owner_v2);
+ if (!attr->tx_sw_owner_v2)
+ attr->tx_sw_owner = MLX5_GET(flow_table_nic_cap, hcattr,
+ flow_table_properties_nic_transmit.sw_owner);
+
#undef GET_RX_REG_X_BITS
#undef GET_TX_REG_X_BITS
@@ -1457,4 +1469,10 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
ft_field_support_2_esw_fdb.metadata_reg_c_8_15);
attr->set_reg_c &= ((0xff & reg_c_8_15) << 8) | esw_reg;
+
+ attr->esw_sw_owner_v2 = MLX5_GET(flow_table_esw_cap, hcattr,
+ flow_table_properties_nic_esw_fdb.sw_owner_v2);
+ if (!attr->esw_sw_owner_v2)
+ attr->esw_sw_owner = MLX5_GET(flow_table_esw_cap, hcattr,
+ flow_table_properties_nic_esw_fdb.sw_owner);
}
return 0;
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h
index f6e8afbf39..da50fc686c 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.h
+++ b/drivers/common/mlx5/mlx5_devx_cmds.h
@@ -338,4 +338,10 @@ struct mlx5_hca_attr {
uint64_t system_image_guid;
uint32_t log_max_conn_track_offload:5;
+ uint8_t rx_sw_owner:1;
+ uint8_t rx_sw_owner_v2:1;
+ uint8_t tx_sw_owner:1;
+ uint8_t tx_sw_owner_v2:1;
+ uint8_t esw_sw_owner:1;
+ uint8_t esw_sw_owner_v2:1;
};
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index 411c35f456..ba33336e58 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -1598,7 +1598,11 @@ enum {
#define MLX5_HCA_FLEX_GTPU_TEID_ENABLED (1UL << 19)
-/* The device steering logic format. */
-#define MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 0x0
-#define MLX5_STEERING_LOGIC_FORMAT_CONNECTX_6DX 0x1
+/* The device steering logic format version. */
+enum {
+ MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 = 0,
+ MLX5_STEERING_LOGIC_FORMAT_CONNECTX_6DX = 1,
+ MLX5_STEERING_LOGIC_FORMAT_CONNECTX_7 = 2,
+ MLX5_STEERING_LOGIC_FORMAT_CONNECTX_8 = 3,
+};
struct mlx5_ifc_cmd_hca_cap_bits {
@@ -2349,5 +2353,7 @@ struct mlx5_ifc_flow_table_nic_cap_bits {
struct mlx5_ifc_flow_table_esw_cap_bits {
- u8 reserved_at_0[0x800];
+ u8 reserved_at_0[0x200];
+ struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
+ u8 reserved_at_400[0x400];
struct mlx5_ifc_ft_fields_support_bits ft_header_modify_esw_fdb;
u8 reserved_at_C00[0x800];
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index 0adfecbfe8..d77b303521 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -1457,4 +1457,43 @@ mlx5_dev_args_check_handler(const char *key, const char *val, void *opaque)
}
+static bool
+mlx5_hws_is_supported(struct mlx5_dev_ctx_shared *sh)
+{
+ return (sh->cdev->config.devx &&
+ sh->cdev->config.hca_attr.wqe_based_flow_table_sup);
+}
+
+static bool
+mlx5_sws_is_any_supported(struct mlx5_dev_ctx_shared *sh)
+{
+ struct mlx5_common_device *cdev = sh->cdev;
+ struct mlx5_hca_attr *hca_attr = &cdev->config.hca_attr;
+
+ if (hca_attr->rx_sw_owner_v2 || hca_attr->rx_sw_owner)
+ return true;
+
+ if (hca_attr->tx_sw_owner_v2 || hca_attr->tx_sw_owner)
+ return true;
+
+ if (hca_attr->eswitch_manager && (hca_attr->esw_sw_owner_v2 || hca_attr->esw_sw_owner))
+ return true;
+
+ return false;
+}
+
+static bool
+mlx5_kvargs_is_used(struct mlx5_kvargs_ctrl *mkvlist, const char *key)
+{
+ const struct rte_kvargs_pair *pair;
+ uint32_t i;
+
+ for (i = 0; i < mkvlist->kvlist->count; ++i) {
+ pair = &mkvlist->kvlist->pairs[i];
+ if (strcmp(pair->key, key) == 0 && mkvlist->is_used[i])
+ return true;
+ }
+ return false;
+}
+
/**
* Parse user device parameters and adjust them according to device
@@ -1497,4 +1536,6 @@ mlx5_shared_dev_ctx_args_config(struct mlx5_dev_ctx_shared *sh,
size_t alignment = rte_mem_page_size();
uint32_t max_queue_umem_size = MLX5_WQE_SIZE * mlx5_dev_get_max_wq_size(sh);
+ bool hws_is_supported = mlx5_hws_is_supported(sh);
+ bool sws_is_supported = mlx5_sws_is_any_supported(sh);
if (alignment == (size_t)-1) {
@@ -1507,7 +1548,13 @@ mlx5_shared_dev_ctx_args_config(struct mlx5_dev_ctx_shared *sh,
config->vf_nl_en = 1;
config->dv_esw_en = 1;
- config->dv_flow_en = 1;
+ if (!sws_is_supported && hws_is_supported)
+ config->dv_flow_en = 2;
+ else
+ config->dv_flow_en = 1;
config->decap_en = 1;
- config->allow_duplicate_pattern = 1;
+ if (config->dv_flow_en == 2)
+ config->allow_duplicate_pattern = 0;
+ else
+ config->allow_duplicate_pattern = 1;
config->fdb_def_rule = 1;
config->cnt_svc.cycle_time = MLX5_CNT_SVC_CYCLE_TIME_DEFAULT;
@@ -1529,4 +1576,24 @@ mlx5_shared_dev_ctx_args_config(struct mlx5_dev_ctx_shared *sh,
config->dv_flow_en = 0;
}
+ /* Inform user if DV flow is not supported. */
+ if (config->dv_flow_en == 1 && !sws_is_supported && hws_is_supported) {
+ DRV_LOG(WARNING, "DV flow is not supported. Changing to HWS mode.");
+ config->dv_flow_en = 2;
+ }
+ /* Handle allow_duplicate_pattern based on final dv_flow_en mode.
+ * HWS mode (dv_flow_en=2) doesn't support duplicate patterns.
+ * Warn only if user explicitly requested an incompatible setting.
+ */
+ bool allow_dup_pattern_set = mkvlist != NULL &&
+ mlx5_kvargs_is_used(mkvlist, MLX5_ALLOW_DUPLICATE_PATTERN);
+ if (config->dv_flow_en == 2) {
+ if (config->allow_duplicate_pattern == 1 && allow_dup_pattern_set)
+ DRV_LOG(WARNING, "Duplicate pattern is not supported with HWS. Disabling it.");
+ config->allow_duplicate_pattern = 0;
+ } else if (!allow_dup_pattern_set) {
+ /* Non-HWS mode: set default to 1 only if not explicitly set by user */
+ config->allow_duplicate_pattern = 1;
+ }
+
if (config->dv_esw_en && !sh->dev_cap.dv_esw_en) {
DRV_LOG(DEBUG, "E-Switch DV flow is not supported.");
--
2.53.0
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2026-02-26 10:16:51.391978201 +0000
+++ 0111-net-mlx5-fix-flow-devargs-handling-for-future-HW.patch 2026-02-26 10:16:47.117459963 +0000
@@ -1 +1 @@
-From 170ebe941be3a4c2a2bddeff039d62088d2c6463 Mon Sep 17 00:00:00 2001
+From 1f535eaf487c1dd331f0c581215b5d9eb714eed8 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 170ebe941be3a4c2a2bddeff039d62088d2c6463 ]
+
@@ -21 +22,0 @@
-Cc: stable at dpdk.org
More information about the stable
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