patch 'net/mlx5/hws: fix stack alignment for ASan compatibility' has been queued to stable release 25.11.1

[Kevin Traynor]

Hi,

FYI, your patch has been queued to stable release 25.11.1

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 03/02/26. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable

This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/ea3871cb655ee2044f2e3e7db5a3c5f10d9e6e06

Thanks.

Kevin

---
>From ea3871cb655ee2044f2e3e7db5a3c5f10d9e6e06 Mon Sep 17 00:00:00 2001
From: Shani Peretz <shperetz at nvidia.com>
Date: Wed, 21 Jan 2026 10:14:47 +0200
Subject: [PATCH] net/mlx5/hws: fix stack alignment for ASan compatibility

[ upstream commit 4c3d83867c1fe17d8bbc803064f62a96fbb25d98 ]

When compiling with optimizations, the compiler uses AVX-512
instructions (vmovdqa64) to efficiently zero large structures.
This instruction requires 64-byte aligned memory addresses.

When compiling with ASAN, the stack layout is modified for
instrumentation, which can break the 64-byte alignment of
local structures. This causes a segfault when the misaligned
vmovdqa64 instruction executes.

Fix by adding MLX5DR_ASAN_ALIGN macro to ensure 64-byte alignment
when building with ASan.

Fixes: 338aaf911665 ("net/mlx5/hws: add send FW match STE using gen WQE")
Fixes: 12802ab2c8e2 ("net/mlx5/hws: support GTA WQE write using FW command")
Fixes: 405242c52dd5 ("net/mlx5/hws: add rule object")

Signed-off-by: Shani Peretz <shperetz at nvidia.com>
Acked-by: Bing Zhao <bingz at nvidia.com>
---
 drivers/net/mlx5/hws/mlx5dr_cmd.c      | 4 ++--
 drivers/net/mlx5/hws/mlx5dr_internal.h | 6 ++++++
 drivers/net/mlx5/hws/mlx5dr_rule.c     | 2 +-
 drivers/net/mlx5/hws/mlx5dr_send.c     | 4 ++--
 4 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.c b/drivers/net/mlx5/hws/mlx5dr_cmd.c
index d6bf015d57..47e6a1fd49 100644
--- a/drivers/net/mlx5/hws/mlx5dr_cmd.c
+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.c
@@ -1014,6 +1014,6 @@ int mlx5dr_cmd_generate_wqe(struct ibv_context *ctx,
 			    struct mlx5_cqe64 *ret_cqe)
 {
-	uint32_t out[MLX5_ST_SZ_DW(generate_wqe_out)] = {0};
-	uint32_t in[MLX5_ST_SZ_DW(generate_wqe_in)] = {0};
+	MLX5DR_ASAN_ALIGN uint32_t out[MLX5_ST_SZ_DW(generate_wqe_out)] = {0};
+	MLX5DR_ASAN_ALIGN uint32_t in[MLX5_ST_SZ_DW(generate_wqe_in)] = {0};
 	uint8_t status;
 	void *ptr;
diff --git a/drivers/net/mlx5/hws/mlx5dr_internal.h b/drivers/net/mlx5/hws/mlx5dr_internal.h
index 2abc516b5e..6a4aafbe88 100644
--- a/drivers/net/mlx5/hws/mlx5dr_internal.h
+++ b/drivers/net/mlx5/hws/mlx5dr_internal.h
@@ -54,4 +54,10 @@
 #endif
 
+#ifdef RTE_MALLOC_ASAN
+#define MLX5DR_ASAN_ALIGN alignas(64)
+#else
+#define MLX5DR_ASAN_ALIGN
+#endif
+
 #ifdef RTE_LIBRTE_MLX5_DEBUG
 /* Prevent double function name print when debug is set */
diff --git a/drivers/net/mlx5/hws/mlx5dr_rule.c b/drivers/net/mlx5/hws/mlx5dr_rule.c
index 895ac858ec..eb06996c90 100644
--- a/drivers/net/mlx5/hws/mlx5dr_rule.c
+++ b/drivers/net/mlx5/hws/mlx5dr_rule.c
@@ -484,5 +484,5 @@ static int mlx5dr_rule_create_hws(struct mlx5dr_rule *rule,
 	struct mlx5dr_matcher *matcher = rule->matcher;
 	struct mlx5dr_context *ctx = matcher->tbl->ctx;
-	struct mlx5dr_send_ste_attr ste_attr = {0};
+	MLX5DR_ASAN_ALIGN struct mlx5dr_send_ste_attr ste_attr = {0};
 	struct mlx5dr_send_ring_dep_wqe *dep_wqe;
 	struct mlx5dr_actions_wqe_setter *setter;
diff --git a/drivers/net/mlx5/hws/mlx5dr_send.c b/drivers/net/mlx5/hws/mlx5dr_send.c
index d01fc7ef2c..85f613ed39 100644
--- a/drivers/net/mlx5/hws/mlx5dr_send.c
+++ b/drivers/net/mlx5/hws/mlx5dr_send.c
@@ -251,6 +251,6 @@ int mlx5dr_send_wqe_fw(struct ibv_context *ibv_ctx,
 	bool has_range = send_wqe_range_data || send_wqe_range_tag;
 	bool has_match = send_wqe_match_data || send_wqe_match_tag;
-	struct mlx5dr_wqe_gta_data_seg_ste gta_wqe_data0 = {0};
-	struct mlx5dr_wqe_gta_data_seg_ste gta_wqe_data1 = {0};
+	MLX5DR_ASAN_ALIGN struct mlx5dr_wqe_gta_data_seg_ste gta_wqe_data0 = {0};
+	MLX5DR_ASAN_ALIGN struct mlx5dr_wqe_gta_data_seg_ste gta_wqe_data1 = {0};
 	struct mlx5dr_wqe_gta_ctrl_seg gta_wqe_ctrl = {0};
 	struct mlx5dr_cmd_generate_wqe_attr attr = {0};
-- 
2.53.0

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2026-02-26 10:16:51.669389365 +0000
+++ 0118-net-mlx5-hws-fix-stack-alignment-for-ASan-compatibil.patch	2026-02-26 10:16:47.149460103 +0000
@@ -1 +1 @@
-From 4c3d83867c1fe17d8bbc803064f62a96fbb25d98 Mon Sep 17 00:00:00 2001
+From ea3871cb655ee2044f2e3e7db5a3c5f10d9e6e06 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 4c3d83867c1fe17d8bbc803064f62a96fbb25d98 ]
+
@@ -21 +22,0 @@
-Cc: stable at dpdk.org