patch 'net/txgbe: fix mass of unknown interrupts' has been queued to stable release 25.11.3

[Kevin Traynor]

Hi,

FYI, your patch has been queued to stable release 25.11.3

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 08/04/26. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable

This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/3bd5602a3c75879680dcaafca0b601bcaede4f9e

Thanks.

Kevin

---
>From 3bd5602a3c75879680dcaafca0b601bcaede4f9e Mon Sep 17 00:00:00 2001
From: Zaiyu Wang <zaiyuwang at trustnetic.com>
Date: Wed, 8 Jul 2026 20:00:28 +0800
Subject: [PATCH] net/txgbe: fix mass of unknown interrupts

[ upstream commit e586adbac0cfb3caa12f08216135387921eef76f ]

When RSC is enabled, Rx ring IVAR is set to configure ITR. It causes Rx
ring interrupts report on the default msix_vector. Thus a mass of unknown
interrupts occupy CPU.

Fix the issue by setting ring IVAR only when the rxq interrupt is enabled.

Fixes: be797cbf4582 ("net/txgbe: add Rx and Tx init")

Signed-off-by: Zaiyu Wang <zaiyuwang at trustnetic.com>
---
 drivers/net/txgbe/txgbe_rxtx.c | 30 +++++++++++++++++-------------
 1 file changed, 17 insertions(+), 13 deletions(-)

diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c
index 1f85873e1b..8d883b1d58 100644
--- a/drivers/net/txgbe/txgbe_rxtx.c
+++ b/drivers/net/txgbe/txgbe_rxtx.c
@@ -4354,4 +4354,6 @@ txgbe_set_rsc(struct rte_eth_dev *dev)
 {
 	struct rte_eth_rxmode *rx_conf = &dev->data->dev_conf.rxmode;
+	struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
+	struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
 	struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
 	struct rte_eth_dev_info dev_info = { 0 };
@@ -4404,6 +4406,4 @@ txgbe_set_rsc(struct rte_eth_dev *dev)
 		uint32_t psrtype =
 			rd32(hw, TXGBE_POOLRSS(rxq->reg_idx));
-		uint32_t eitr =
-			rd32(hw, TXGBE_ITR(rxq->reg_idx));
 
 		/*
@@ -4424,4 +4424,7 @@ txgbe_set_rsc(struct rte_eth_dev *dev)
 		psrtype |= TXGBE_POOLRSS_L4HDR;
 
+		wr32(hw, TXGBE_RXCFG(rxq->reg_idx), srrctl);
+		wr32(hw, TXGBE_POOLRSS(rxq->reg_idx), psrtype);
+
 		/*
 		 * RSC: Set ITR interval corresponding to 2K ints/s.
@@ -4437,17 +4440,18 @@ txgbe_set_rsc(struct rte_eth_dev *dev)
 		 * at most 500us latency for a single RSC aggregation.
 		 */
-		eitr &= ~TXGBE_ITR_IVAL_MASK;
-		eitr |= TXGBE_ITR_IVAL_10G(TXGBE_QUEUE_ITR_INTERVAL_DEFAULT);
-		eitr |= TXGBE_ITR_WRDSA;
+		if (rte_intr_dp_is_en(intr_handle)) {
+			uint32_t eitr = rd32(hw, TXGBE_ITR(rxq->reg_idx));
 
-		wr32(hw, TXGBE_RXCFG(rxq->reg_idx), srrctl);
-		wr32(hw, TXGBE_POOLRSS(rxq->reg_idx), psrtype);
-		wr32(hw, TXGBE_ITR(rxq->reg_idx), eitr);
+			eitr &= ~TXGBE_ITR_IVAL_MASK;
+			eitr |= TXGBE_ITR_IVAL_10G(TXGBE_QUEUE_ITR_INTERVAL_DEFAULT);
+			eitr |= TXGBE_ITR_WRDSA;
+			wr32(hw, TXGBE_ITR(rxq->reg_idx), eitr);
 
-		/*
-		 * RSC requires the mapping of the queue to the
-		 * interrupt vector.
-		 */
-		txgbe_set_ivar_map(hw, 0, rxq->reg_idx, i);
+			/*
+			 * RSC requires the mapping of the queue to the
+			 * interrupt vector.
+			 */
+			txgbe_set_ivar_map(hw, 0, rxq->reg_idx, i);
+		}
 	}
 
-- 
2.55.0

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2026-07-30 13:22:52.686344313 +0100
+++ 0015-net-txgbe-fix-mass-of-unknown-interrupts.patch	2026-07-30 13:22:52.247386088 +0100
@@ -1 +1 @@
-From e586adbac0cfb3caa12f08216135387921eef76f Mon Sep 17 00:00:00 2001
+From 3bd5602a3c75879680dcaafca0b601bcaede4f9e Mon Sep 17 00:00:00 2001
@@ -3 +3 @@
-Date: Wed, 24 Jun 2026 19:52:42 +0800
+Date: Wed, 8 Jul 2026 20:00:28 +0800
@@ -5,0 +6,2 @@
+[ upstream commit e586adbac0cfb3caa12f08216135387921eef76f ]
+
@@ -13 +14,0 @@
-Cc: stable at dpdk.org
@@ -21 +22 @@
-index d5dcec3a2c..906ff16b67 100644
+index 1f85873e1b..8d883b1d58 100644
@@ -24 +25 @@
-@@ -4348,4 +4348,6 @@ txgbe_set_rsc(struct rte_eth_dev *dev)
+@@ -4354,4 +4354,6 @@ txgbe_set_rsc(struct rte_eth_dev *dev)
@@ -27 +28 @@
-+	struct rte_pci_device *pci_dev = RTE_CLASS_TO_BUS_DEVICE(dev, *pci_dev);
++	struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
@@ -31 +32 @@
-@@ -4398,6 +4400,4 @@ txgbe_set_rsc(struct rte_eth_dev *dev)
+@@ -4404,6 +4406,4 @@ txgbe_set_rsc(struct rte_eth_dev *dev)
@@ -38 +39 @@
-@@ -4418,4 +4418,7 @@ txgbe_set_rsc(struct rte_eth_dev *dev)
+@@ -4424,4 +4424,7 @@ txgbe_set_rsc(struct rte_eth_dev *dev)
@@ -46 +47 @@
-@@ -4431,17 +4434,18 @@ txgbe_set_rsc(struct rte_eth_dev *dev)
+@@ -4437,17 +4440,18 @@ txgbe_set_rsc(struct rte_eth_dev *dev)