patch 'common/cnxk: fix NIX QINT count reset' has been queued to stable release 24.11.9
luca.boccassi at gmail.com
luca.boccassi at gmail.com
Thu Nov 5 17:41:43 CET 2026
Hi,
FYI, your patch has been queued to stable release 24.11.9
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 11/07/26. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/bluca/dpdk-stable
This queued commit can be viewed at:
https://github.com/bluca/dpdk-stable/commit/f76b147602ae5a676ac2955ed110a9d4c80892f7
Thanks.
Luca Boccassi
---
>From f76b147602ae5a676ac2955ed110a9d4c80892f7 Mon Sep 17 00:00:00 2001
From: Rahul Bhansali <rbhansali at marvell.com>
Date: Thu, 17 Sep 2026 12:40:05 +0530
Subject: [PATCH] common/cnxk: fix NIX QINT count reset
[ upstream commit f04d59441916180c0b72d4d64aee2187be2095f4 ]
Fix QINT count reset on NIX queue IRQs register and
unregister.
Queue interrupt will be cleared by individual queue
interrupt operation register update.
Fixes: f6d567b03d28 ("common/cnxk: support NIX IRQ")
Fixes: 3c100e0e6b9c ("common/cnxk: support per-port RQ in inline device")
Signed-off-by: Rahul Bhansali <rbhansali at marvell.com>
---
drivers/common/cnxk/roc_nix_inl_dev_irq.c | 21 ++++++++++++---------
drivers/common/cnxk/roc_nix_irq.c | 12 ++++++------
2 files changed, 18 insertions(+), 15 deletions(-)
diff --git a/drivers/common/cnxk/roc_nix_inl_dev_irq.c b/drivers/common/cnxk/roc_nix_inl_dev_irq.c
index becd7907f24..2a560e59812 100644
--- a/drivers/common/cnxk/roc_nix_inl_dev_irq.c
+++ b/drivers/common/cnxk/roc_nix_inl_dev_irq.c
@@ -308,6 +308,7 @@ nix_inl_nix_register_irqs(struct nix_inl_dev *inl_dev)
struct nix_inl_qint *qints_mem;
int rc, q, ret = 0;
uint16_t msixoff;
+ uint64_t cnt;
int qints;
msixoff = inl_dev->nix_msixoff;
@@ -346,8 +347,10 @@ nix_inl_nix_register_irqs(struct nix_inl_dev *inl_dev)
for (q = 0; q < qints; q++) {
/* Clear QINT CNT, interrupt */
- plt_write64(0, nix_base + NIX_LF_QINTX_CNT(q));
plt_write64(~0ull, nix_base + NIX_LF_QINTX_ENA_W1C(q));
+ cnt = plt_read64(nix_base + NIX_LF_QINTX_CNT(q));
+ plt_write64((uint64_t)(-(int64_t)cnt), nix_base + NIX_LF_QINTX_CNT(q));
+ plt_write64(~0ull, nix_base + NIX_LF_QINTX_INT(q));
/* Register queue irq vector */
ret = dev_irq_register(handle, nix_inl_nix_q_irq, &qints_mem[q],
@@ -355,9 +358,7 @@ nix_inl_nix_register_irqs(struct nix_inl_dev *inl_dev)
if (ret)
break;
- plt_write64(0, nix_base + NIX_LF_QINTX_CNT(q));
- plt_write64(0, nix_base + NIX_LF_QINTX_INT(q));
- /* Enable QINT interrupt */
+ /* Enable QINT interrupt (count/INT already drained above) */
plt_write64(~0ull, nix_base + NIX_LF_QINTX_ENA_W1S(q));
qints_mem[q].inl_dev = inl_dev;
@@ -375,6 +376,7 @@ nix_inl_nix_unregister_irqs(struct nix_inl_dev *inl_dev)
struct nix_inl_qint *qints_mem = inl_dev->qints_mem;
uintptr_t nix_base = inl_dev->nix_base;
uint16_t msixoff;
+ uint64_t cnt;
int q;
msixoff = inl_dev->nix_msixoff;
@@ -389,17 +391,18 @@ nix_inl_nix_unregister_irqs(struct nix_inl_dev *inl_dev)
msixoff + NIX_LF_INT_VEC_POISON);
for (q = 0; q < inl_dev->configured_qints; q++) {
- /* Clear QINT CNT */
- plt_write64(0, nix_base + NIX_LF_QINTX_CNT(q));
- plt_write64(0, nix_base + NIX_LF_QINTX_INT(q));
-
- /* Disable QINT interrupt */
+ /* Clear QINT CNT, interrupt */
plt_write64(~0ull, nix_base + NIX_LF_QINTX_ENA_W1C(q));
+ cnt = plt_read64(nix_base + NIX_LF_QINTX_CNT(q));
+ plt_write64((uint64_t)(-(int64_t)cnt), nix_base + NIX_LF_QINTX_CNT(q));
+ plt_write64(~0ull, nix_base + NIX_LF_QINTX_INT(q));
+
/* Unregister queue irq vector */
dev_irq_unregister(handle, nix_inl_nix_q_irq, &qints_mem[q],
msixoff + NIX_LF_INT_VEC_QINT_START + q);
}
+ inl_dev->configured_qints = 0;
plt_free(inl_dev->qints_mem);
inl_dev->qints_mem = NULL;
diff --git a/drivers/common/cnxk/roc_nix_irq.c b/drivers/common/cnxk/roc_nix_irq.c
index 2b731302cd2..3e1e6528ac8 100644
--- a/drivers/common/cnxk/roc_nix_irq.c
+++ b/drivers/common/cnxk/roc_nix_irq.c
@@ -320,9 +320,6 @@ nix_lf_q_irq(void *param)
plt_err("SQ=%d NIX_SQINT_SQB_ALLOC_FAIL", sq);
}
- /* Clear interrupt */
- plt_write64(intr, nix->base + NIX_LF_QINTX_INT(qintx));
-
/* Dump registers to std out */
roc_nix_lf_reg_dump(nix_priv_to_roc_nix(nix), NULL);
roc_nix_queues_ctx_dump(nix_priv_to_roc_nix(nix), NULL);
@@ -338,6 +335,7 @@ roc_nix_register_queue_irqs(struct roc_nix *roc_nix)
int vec, q, sqs, rqs, qs, rc = 0;
struct plt_intr_handle *handle;
struct nix *nix;
+ int64_t val;
nix = roc_nix_to_nix_priv(roc_nix);
handle = nix->pci_dev->intr_handle;
@@ -358,7 +356,8 @@ roc_nix_register_queue_irqs(struct roc_nix *roc_nix)
vec = nix->msixoff + NIX_LF_INT_VEC_QINT_START + q;
/* Clear QINT CNT */
- plt_write64(0, nix->base + NIX_LF_QINTX_CNT(q));
+ val = plt_read64(nix->base + NIX_LF_QINTX_CNT(q));
+ plt_write64(-val, nix->base + NIX_LF_QINTX_CNT(q));
/* Clear interrupt */
plt_write64(~0ull, nix->base + NIX_LF_QINTX_ENA_W1C(q));
@@ -375,7 +374,6 @@ roc_nix_register_queue_irqs(struct roc_nix *roc_nix)
if (rc)
break;
- plt_write64(0, nix->base + NIX_LF_QINTX_CNT(q));
plt_write64(0, nix->base + NIX_LF_QINTX_INT(q));
/* Enable QINT interrupt */
plt_write64(~0ull, nix->base + NIX_LF_QINTX_ENA_W1S(q));
@@ -389,6 +387,7 @@ roc_nix_unregister_queue_irqs(struct roc_nix *roc_nix)
{
struct plt_intr_handle *handle;
struct nix *nix;
+ int64_t val;
int vec, q;
nix = roc_nix_to_nix_priv(roc_nix);
@@ -398,7 +397,8 @@ roc_nix_unregister_queue_irqs(struct roc_nix *roc_nix)
vec = nix->msixoff + NIX_LF_INT_VEC_QINT_START + q;
/* Clear QINT CNT */
- plt_write64(0, nix->base + NIX_LF_QINTX_CNT(q));
+ val = plt_read64(nix->base + NIX_LF_QINTX_CNT(q));
+ plt_write64(-val, nix->base + NIX_LF_QINTX_CNT(q));
plt_write64(0, nix->base + NIX_LF_QINTX_INT(q));
/* Clear interrupt */
--
2.47.3
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2026-11-05 16:42:45.656809689 +0000
+++ 0016-common-cnxk-fix-NIX-QINT-count-reset.patch 2026-11-05 16:42:44.901060188 +0000
@@ -1 +1 @@
-From f04d59441916180c0b72d4d64aee2187be2095f4 Mon Sep 17 00:00:00 2001
+From f76b147602ae5a676ac2955ed110a9d4c80892f7 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit f04d59441916180c0b72d4d64aee2187be2095f4 ]
+
@@ -14 +15,0 @@
-Cc: stable at dpdk.org
@@ -23 +24 @@
-index 30986e780ab..afbf966f780 100644
+index becd7907f24..2a560e59812 100644
@@ -26 +27 @@
-@@ -396,6 +396,7 @@ nix_inl_nix_register_irqs(struct nix_inl_dev *inl_dev)
+@@ -308,6 +308,7 @@ nix_inl_nix_register_irqs(struct nix_inl_dev *inl_dev)
@@ -34 +35 @@
-@@ -434,8 +435,10 @@ nix_inl_nix_register_irqs(struct nix_inl_dev *inl_dev)
+@@ -346,8 +347,10 @@ nix_inl_nix_register_irqs(struct nix_inl_dev *inl_dev)
@@ -46 +47 @@
-@@ -443,9 +446,7 @@ nix_inl_nix_register_irqs(struct nix_inl_dev *inl_dev)
+@@ -355,9 +358,7 @@ nix_inl_nix_register_irqs(struct nix_inl_dev *inl_dev)
@@ -57 +58 @@
-@@ -463,6 +464,7 @@ nix_inl_nix_unregister_irqs(struct nix_inl_dev *inl_dev)
+@@ -375,6 +376,7 @@ nix_inl_nix_unregister_irqs(struct nix_inl_dev *inl_dev)
@@ -65 +66 @@
-@@ -477,17 +479,18 @@ nix_inl_nix_unregister_irqs(struct nix_inl_dev *inl_dev)
+@@ -389,17 +391,18 @@ nix_inl_nix_unregister_irqs(struct nix_inl_dev *inl_dev)
@@ -90 +91 @@
-index 6874435a4eb..50a19434116 100644
+index 2b731302cd2..3e1e6528ac8 100644
@@ -93 +94 @@
-@@ -324,9 +324,6 @@ nix_lf_q_irq(void *param)
+@@ -320,9 +320,6 @@ nix_lf_q_irq(void *param)
@@ -100,3 +101,3 @@
- /* Call reset callback */
- if (intr_cb && dev->ops->q_err_cb)
- dev->ops->q_err_cb(nix_priv_to_roc_nix(nix), NULL);
+ /* Dump registers to std out */
+ roc_nix_lf_reg_dump(nix_priv_to_roc_nix(nix), NULL);
+ roc_nix_queues_ctx_dump(nix_priv_to_roc_nix(nix), NULL);
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