|SUCCESS| pw167472 [PATCH v2] common/mlx5: fix high SMMU TLB miss with mempool alignment

[qemudev at loongson.cn]

Test-Label: loongson-compile-loongarch-abi2
Test-Status: SUCCESS
http://dpdk.org/patch/167472

_Compilation OK_

Submitter: Xingui Yang <yangxingui at huawei.com>
Date: Tue, 11 Aug 2026 16:52:31 +0800
DPDK git baseline: Repo:dpdk-next-net-mlx
  Branch: next-net-mlx-for-next-net
  CommitID: 99f2c86187ab74c795304d1b91b4bc15709b281b

167472 --> meson & ninja build successfully

Test environment and result as below:

+---------------------+----------------+
|     Environment     | compilation    |
+---------------------+----------------+
| Loongnix-Server 23.2 | PASS           |
+---------------------+----------------+

Loongnix-Server 23.2
    Kernel: 6.6.52-1.10.lns23.loongarch64
    Compiler: gcc 12.3