|SUCCESS| eal: fix data race in hugepage prefault
dpdklab at iol.unh.edu
dpdklab at iol.unh.edu
Wed May 20 21:23:42 CEST 2026
Test-Label: ai-code-review
Test-Status: SUCCESS
https://dpdk.org/patch/164214
_AI Code Review_
=== Patch Review: series.patch (via Claude) ===
Review date: 2026-05-20
git sha a39bc31c7b (unknown)
Author: Stephen Hemminger <stephen at networkplumber.org>
Subject: [PATCH] eal: fix data race in hugepage prefault
This patch modifies the hugepage prefault mechanism in alloc_seg() to use
an atomic operation instead of a non-atomic read-modify-write sequence.
> .mailmap | 1 +
> lib/eal/linux/eal_memalloc.c | 7 ++++---
> 2 files changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/.mailmap b/.mailmap
> index 4d26d9c286..07c49eb32f 100644
> --- a/.mailmap
> +++ b/.mailmap
[ ... ]
> diff --git a/lib/eal/linux/eal_memalloc.c b/lib/eal/linux/eal_memalloc.c
> index a39bc31c7b..e73a0c11a6 100644
> --- a/lib/eal/linux/eal_memalloc.c
> +++ b/lib/eal/linux/eal_memalloc.c
> @@ -25,6 +25,7 @@
> #include <linux/falloc.h>
> #include <linux/mman.h> /* for hugetlb-related mmap flags */
>
> +#include <rte_atomic.h>
> #include <rte_common.h>
> #include <rte_log.h>
> #include <rte_eal.h>
> @@ -597,10 +598,10 @@ alloc_seg(struct rte_memseg *ms, void *addr, int socket_id,
>
> /* we need to trigger a write to the page to enforce page fault and
> * ensure that page is accessible to us, but we can't overwrite value
> - * that is already there, so read the old value, and write itback.
> - * kernel populates the page with zeroes initially.
> + * that is already there.
> + * Use an atomic OR with zero to touch the page without changing its contents.
> */
> - *(volatile int *)addr = *(volatile int *)addr;
> + (void)rte_atomic_fetch_or_explicit((int *)addr, 0, rte_memory_order_relaxed);
Does this function guarantee proper alignment for atomic operations? The
addr pointer is void* and comes from mmap(), which typically provides
page-aligned addresses, but is this guaranteed to be safe for
rte_atomic_fetch_or_explicit() on all architectures DPDK supports?
Does casting away const/volatile from addr via (int *) potentially cause
issues with memory ordering or compiler optimizations? Should this use a
volatile int* or rte_atomic_int_t*?
Does rte_memory_order_relaxed provide sufficient guarantees here? The
original code used volatile, which provides some ordering. Does the race
condition with secondary processes require acquire or release semantics?
Does the atomic OR operation guarantee that the page fault will occur on
all architectures? Some architectures might optimize away atomic operations
that don't actually modify the value. Is there documentation or testing
that confirms this behavior?
>
> iova = rte_mem_virt2iova(addr);
> if (iova == RTE_BAD_PHYS_ADDR) {
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