|SUCCESS| [v2] config/arm: add Marvell CN20k

[dpdklab at iol.unh.edu]

Test-Label: ai-code-review
Test-Status: SUCCESS
https://dpdk.org/patch/172353

_AI Code Review_

=== Patch Review: series.patch (via Claude) ===
Review date: 2026-11-02

# DPDK Patch Review

## Patch Summary
Adds ARM cross-compilation configuration support for Marvell CN20k SoC (Neoverse N3 cores).

## ERRORS

None.

## WARNINGS

None.

## INFO

**CPU Part Number Verification:**
The patch sets `'part_number': '0xd8e'` for the Neoverse N3 core.
According to ARM documentation, the correct part number for Neoverse N3 is `0xd8e`.
This appears correct, but please verify against official ARM Technical Reference Manual
as part numbers must match hardware exactly for proper feature detection.

**Maximum NUMA Nodes:**
The patch sets `'RTE_MAX_NUMA_NODES'` to 1.
Verify this matches the actual CN20k hardware configuration.
Many server-class ARM SoCs support multi-socket configurations with multiple NUMA nodes.

**Maximum LCOREs:**
`'RTE_MAX_LCORE'` is set to 42.
This seems unusual (not a power of 2 or a typical core count).
Verify this matches the exact core count of CN20k SKUs.
Consider whether this should account for SMT or future SKU variants.

**Missing crypto march feature:**
Related SoC configs like `soc_cobalt100` include `'extra_march_features': ['crypto']`
to enable ARM Crypto Extensions.
If CN20k (Neoverse N3) supports the ARMv8 Crypto Extensions,
consider adding this field for optimal cryptographic performance.

**Documentation:**
No release notes update is included.
While adding a new SoC config is primarily a build system change,
consider whether this warrants a mention in release notes
as it enables support for a new platform family.

Review-Result: CLEAN