[dpdk-users] Queue pairs in C626 QAT Card

Trahe, Fiona fiona.trahe at intel.com
Wed Dec 2 10:33:01 CET 2020


> -----Original Message-----
> From: users <users-bounces at dpdk.org> On Behalf Of Joshi, Venkatesh
> Sent: Tuesday, December 1, 2020 10:46 AM
> To: users at dpdk.org
> Subject: [dpdk-users] Queue pairs in C626 QAT Card
> 
> Hi,
> 
> What is the maximum number of queue pairs in C626 QAT card?
[Fiona] I'm not familiar with the card numbers but assume this has a C62X device.
> 
> From rte_cryptodev_info_get(), it seems that the maximum number is 2. Is this correct?
[Fiona] Yes - this is a hardware limitation.
> 
> Can it be increased via configuration or is this set in hardware?
> 
> I have a DPDK application running 5 instances on 5 CPUs. I need the QAT VF to be bound to each of the
> CPUs. But, this limitation of 2 queue pairs means that only 2 of the CPUs can communicate with QAT VF
> at any given point.
[Fiona] So you should allocate 3 VFs to the application, giving you 6 qps.

> 
> Regards,
> Venkatesh
> 



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