[dpdk-dev] [PATCH 4/6] mempool/cnxk: add base cn10k mempool ops

Ashwin Sekhar T K asekhar at marvell.com
Fri Mar 5 17:21:47 CET 2021


Add base cn10k mempool ops.

Signed-off-by: Ashwin Sekhar T K <asekhar at marvell.com>
---
 drivers/mempool/cnxk/cn10k_mempool_ops.c | 46 ++++++++++++++++++++++++
 drivers/mempool/cnxk/meson.build         |  3 +-
 2 files changed, 48 insertions(+), 1 deletion(-)
 create mode 100644 drivers/mempool/cnxk/cn10k_mempool_ops.c

diff --git a/drivers/mempool/cnxk/cn10k_mempool_ops.c b/drivers/mempool/cnxk/cn10k_mempool_ops.c
new file mode 100644
index 0000000000..fc7592fd94
--- /dev/null
+++ b/drivers/mempool/cnxk/cn10k_mempool_ops.c
@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#include <rte_mempool.h>
+
+#include "roc_api.h"
+#include "cnxk_mempool.h"
+
+static int
+cn10k_mempool_alloc(struct rte_mempool *mp)
+{
+	uint32_t block_size;
+	size_t padding;
+
+	block_size = mp->elt_size + mp->header_size + mp->trailer_size;
+	/* Align header size to ROC_ALIGN */
+	if (mp->header_size % ROC_ALIGN != 0) {
+		padding = RTE_ALIGN_CEIL(mp->header_size, ROC_ALIGN) -
+			  mp->header_size;
+		mp->header_size += padding;
+		block_size += padding;
+	}
+
+	/* Align block size to ROC_ALIGN */
+	if (block_size % ROC_ALIGN != 0) {
+		padding = RTE_ALIGN_CEIL(block_size, ROC_ALIGN) - block_size;
+		mp->trailer_size += padding;
+		block_size += padding;
+	}
+
+	return cnxk_mempool_alloc(mp);
+}
+
+static struct rte_mempool_ops cn10k_mempool_ops = {
+	.name = "cn10k_mempool_ops",
+	.alloc = cn10k_mempool_alloc,
+	.free = cnxk_mempool_free,
+	.enqueue = cnxk_mempool_enq,
+	.dequeue = cnxk_mempool_deq,
+	.get_count = cnxk_mempool_get_count,
+	.calc_mem_size = cnxk_mempool_calc_mem_size,
+	.populate = cnxk_mempool_populate,
+};
+
+MEMPOOL_REGISTER_OPS(cn10k_mempool_ops);
diff --git a/drivers/mempool/cnxk/meson.build b/drivers/mempool/cnxk/meson.build
index 4ce865e18b..46f502bf3a 100644
--- a/drivers/mempool/cnxk/meson.build
+++ b/drivers/mempool/cnxk/meson.build
@@ -15,7 +15,8 @@ endif
 
 sources = files('cnxk_mempool.c',
 		'cnxk_mempool_ops.c',
-		'cn9k_mempool_ops.c')
+		'cn9k_mempool_ops.c',
+		'cn10k_mempool_ops.c')
 
 deps += ['eal', 'mbuf', 'kvargs', 'bus_pci', 'common_cnxk', 'mempool']
 
-- 
2.29.2



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