meson option to customize RTE_PKTMBUF_HEADROOM patch

Garrett D'Amore garrett at damore.org
Tue Mar 26 22:10:38 CET 2024


Fair enough... I think that is just something we're going to have to live with.

The other solutions are either much more painful, or much more work.

If we can use header/buffer splitting that would be superior.  Right now we can't use that everywhere because it isn't available everywhere.
On Mar 26, 2024 at 1:35 PM -0700, Stephen Hemminger <stephen at networkplumber.org>, wrote:
> On Tue, 26 Mar 2024 10:43:30 -0700
> Garrett D'Amore <garrett at damore.org> wrote:
>
> > This had occurred to me as well.  I think most hardware DMA engines can align on 32-bit boundaries.  I've yet to see a device that actually requires 64-bit DMA alignment.  (But I have only looked at a subset  of devices, and most of the  ones I have looked at are not ones that would be considered 'modern'.)
>
> There maybe a PCI transaction performance penalty if not aligned.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mails.dpdk.org/archives/dev/attachments/20240326/43c08693/attachment.htm>


More information about the dev mailing list