[PATCH 0/2] align crypto CPTR as per platform

[Tejasree Kondoj]

Aligning CPTR as per HW requirements for
cnxk crypto PMD.

Nithinsen Kaithakadan (1):
  common/cnxk: set CPT cache line size per platform

Tejasree Kondoj (1):
  crypto/cnxk: align TLS CPTR to 256B

 drivers/common/cnxk/roc_cpt.c       |  4 +--
 drivers/common/cnxk/roc_cpt.h       |  5 +++
 drivers/crypto/cnxk/cn20k_tls.c     | 47 +++++++++++++++++++++++------
 drivers/crypto/cnxk/cn20k_tls.h     | 15 ++++++---
 drivers/crypto/cnxk/cn20k_tls_ops.h |  6 +++-
 5 files changed, 60 insertions(+), 17 deletions(-)

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2.25.1