patch 'net/mlx5: fix GRE flow item translation for root table' has been queued to stable release 23.11.3

Xueming Li xuemingl at nvidia.com
Sat Dec 7 08:59:32 CET 2024


Hi,

FYI, your patch has been queued to stable release 23.11.3

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 12/10/24. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://git.dpdk.org/dpdk-stable/log/?h=23.11-staging

This queued commit can be viewed at:
https://git.dpdk.org/dpdk-stable/commit/?h=23.11-staging&id=e75c93ede016324bcb760712717bb784c4018a88

Thanks.

Xueming Li <xuemingl at nvidia.com>

---
>From e75c93ede016324bcb760712717bb784c4018a88 Mon Sep 17 00:00:00 2001
From: Gregory Etelson <getelson at nvidia.com>
Date: Sun, 27 Oct 2024 14:39:16 +0200
Subject: [PATCH] net/mlx5: fix GRE flow item translation for root table
Cc: Xueming Li <xuemingl at nvidia.com>

[ upstream commit 25ab2cbba31d937e685f0cf9ecce0c680cc4083e ]

Flow items translations for the root tables reuse DV code. However,
the DV GRE item translation did not initialize the item mask for HWS
template. Initialize the mask to fix GRE item translation for root
tables when using HWS.

Fixes: cd4ab742064a ("net/mlx5: split flow item matcher and value translation")

Signed-off-by: Gregory Etelson <getelson at nvidia.com>
Acked-by: Suanming Mou <suanmingm at nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_dv.c | 23 ++++++++++++-----------
 1 file changed, 12 insertions(+), 11 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index b447b1598a..09c7068339 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -9476,22 +9476,23 @@ flow_dv_translate_item_gre(void *key, const struct rte_flow_item *item,
 	} gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
 	uint16_t protocol_m, protocol_v;

-	if (key_type & MLX5_SET_MATCHER_M)
+	if (key_type & MLX5_SET_MATCHER_M) {
 		MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, 0xff);
-	else
+		if (!gre_m)
+			gre_m = &rte_flow_item_gre_mask;
+		gre_v = gre_m;
+	} else {
 		MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
 			 IPPROTO_GRE);
-	if (!gre_v) {
-		gre_v = &empty_gre;
-		gre_m = &empty_gre;
-	} else {
-		if (!gre_m)
+		if (!gre_v) {
+			gre_v = &empty_gre;
+			gre_m = &empty_gre;
+		} else if (!gre_m) {
 			gre_m = &rte_flow_item_gre_mask;
+		}
+		if (key_type == MLX5_SET_MATCHER_HS_V)
+			gre_m = gre_v;
 	}
-	if (key_type & MLX5_SET_MATCHER_M)
-		gre_v = gre_m;
-	else if (key_type == MLX5_SET_MATCHER_HS_V)
-		gre_m = gre_v;
 	gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
 	gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
 	MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
--
2.34.1

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2024-12-06 23:26:44.614033120 +0800
+++ 0014-net-mlx5-fix-GRE-flow-item-translation-for-root-tabl.patch	2024-12-06 23:26:43.873044829 +0800
@@ -1 +1 @@
-From 25ab2cbba31d937e685f0cf9ecce0c680cc4083e Mon Sep 17 00:00:00 2001
+From e75c93ede016324bcb760712717bb784c4018a88 Mon Sep 17 00:00:00 2001
@@ -4,0 +5,3 @@
+Cc: Xueming Li <xuemingl at nvidia.com>
+
+[ upstream commit 25ab2cbba31d937e685f0cf9ecce0c680cc4083e ]
@@ -12 +14,0 @@
-Cc: stable at dpdk.org
@@ -21 +23 @@
-index 040727f2e8..dc5263ace3 100644
+index b447b1598a..09c7068339 100644
@@ -24 +26 @@
-@@ -9830,22 +9830,23 @@ flow_dv_translate_item_gre(void *key, const struct rte_flow_item *item,
+@@ -9476,22 +9476,23 @@ flow_dv_translate_item_gre(void *key, const struct rte_flow_item *item,


More information about the stable mailing list