|SUCCESS| net/ice: fix max number of descriptors for E830

[dpdklab at iol.unh.edu]

Test-Label: ai-code-review
Test-Status: SUCCESS
https://dpdk.org/patch/170850

_AI Code Review_

=== Patch Review: series.patch (via Claude) ===
Review date: 2026-10-08

# DPDK Patch Review

## Summary
This patch fixes descriptor limit handling for Intel E830 NICs. The code correctly addresses a mismatch between advertised limits and actual hardware capabilities.

---

## Findings

### **Errors**

None.

### **Warnings**

None.

### **Info**

**1. Code correctness - verified**

The patch correctly identifies and fixes an inconsistency where:
- Ring allocation used `ICE_MAX_NUM_DESC_BY_MAC(hw)` (E830-aware, returns 8096)
- Advertised limits and queue setup checks used `ICE_MAX_RING_DESC` (generic 8160)

This mismatch allowed applications to request 8160 descriptors on E830, causing the Tx time queue length field (13-bit) to overflow when packet pacing is enabled.

The fix uniformly applies `ICE_MAX_NUM_DESC_BY_MAC(hw)` across:
- `dev_info->rx_desc_lim.nb_max`
- `dev_info->tx_desc_lim.nb_max`
- `dev_info->tx_desc_lim.nb_seg_max`
- Rx queue setup validation
- Tx queue setup validation

**2. Patch structure - good**

- Code and documentation (commit message) updated together
- Fix is minimal and focused
- Properly tagged with `Fixes:` and `Cc: stable at dpdk.org`
- Each modified location is consistent with the stated problem

**3. No release notes update**

While the commit message clearly describes the bug being fixed, this is a user-visible behavior change (maximum descriptor count differs on E830). Consider whether this should be documented in the release notes under "Fixed Issues" for the net/ice PMD. However, since this is a bug fix being backported to stable, and the commit message is detailed, omitting release notes may be acceptable.

---

## Conclusion

The patch is **correct and well-structured**. No errors or warnings identified. The fix appropriately addresses the descriptor limit inconsistency for E830 hardware by using the hardware-specific macro throughout.