|SUCCESS| common/cnxk: handle increased count eot width for cn20k

[dpdklab at iol.unh.edu]

Test-Label: ai-code-review
Test-Status: SUCCESS
https://dpdk.org/patch/172272

_AI Code Review_

=== Patch Review: series.patch (via Claude) ===
Review date: 2026-10-30

# DPDK Patch Review

## ERRORS

None.

## WARNINGS

None.

## INFO

**1. Hardware register field width extension**

The patch extends the COUNT_EOT field from 1 bit to 2 bits to accommodate CN20K hardware while maintaining backward compatibility with CN10K (where bit 33 is reserved and ignored). This is a valid hardware-specific change.

The implementation correctly uses `num & 0x3` to mask to 2 bits and updates both `roc_npa_aura_batch_free()` and `roc_npa_aura_batch_free_burst()` consistently.

**2. Comment formatting improvement applied**

The patch adds a space after the cast operators (`(uint64_t)` becomes `(uint64_t) `) in the existing lines, which improves readability and is consistent with DPDK style preferences.

**3. Magic constant explanation**

The use of `0x3UL` in the burst function (line 567) is now explained by the comment. The value represents a 2-bit mask for COUNT_EOT, replacing the previous 1-bit `0x1UL`.

**4. ASCII art diagrams updated**

Both register layout diagrams correctly reflect the new bit allocation:
- Old: `62  33 32       32` (1-bit COUNT_EOT at bit 32)
- New: `62  34 33       32` (2-bit COUNT_EOT at bits 33:32)

This is a hardware compatibility enhancement with no functional regression on existing platforms.

Review-Result: CLEAN